PIC16F1946 Datasheet, PDF (42/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16F/LF1946/47
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other
Resets
Bank 9
480h⁽²⁾ INDF0
481h⁽²⁾ INDF1
482h⁽²⁾ PCL
483h⁽²⁾ STATUS
404h⁽²⁾ FSR0L
485h⁽²⁾ FSR0H
486h⁽²⁾ FSR1L
487h⁽²⁾ FSR1H
488h⁽²⁾ BSR
489h⁽²⁾ WREG
48Ah^{(1, 2)} PCLATH
48Bh⁽²⁾ INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
DC
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
— Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
48Ch
—
Unimplemented
—
—
48Dh
WPUG
—
—
WPUG5
—
—
—
—
— --1- ---- --1- ----
48Eh
—
Unimplemented
—
—
48Fh
—
Unimplemented
—
—
490h
—
Unimplemented
—
—
491h
RC2REG
USART Receive Data Register
0000 0000 0000 0000
492h
TX2REG
USART Transmit Data Register
0000 0000 0000 0000
493h
SP2BRGL
EUSART2 Baud Rate Generator, Low Byte
0000 0000 0000 0000
494h
SP2BRGH
EUSART2 Baud Rate Generator, High Byte
0000 0000 0000 0000
495h
RC2STA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x 0000 000x
496h
TX2STA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D 0000 0010 0000 0010
497h
BAUDCON2 ABDOVF RCIDL
—
SCKP
BRG16
—
WUE ABDEN 01-0 0-00 01-0 0-00
498h
—
Unimplemented
—
—
499h
—
Unimplemented
—
—
49Ah
—
Unimplemented
—
—
49Bh
—
Unimplemented
—
—
49Ch
—
Unimplemented
—
—
49Dh
—
Unimplemented
—
—
49Eh
—
Unimplemented
—
—
49Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
DS41414A-page 40
Preliminary
 2010 Microchip Technology Inc.