PIC16F1946 Datasheet, PDF (139/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16F/LF1946/47
REGISTER 12-18: LATE: PORTE DATA LATCH REGISTER
R/W-x/u
LATE7
bit 7
R/W-x/u
LATE6
R/W-x/u
LATE5
R/W-x/u
LATE4
R/W-x/u
LATE3
R/W-x/u
LATE2
R/W-x/u
LATE1
R/W-x/u
LATE0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
LATE<7:0>: PORTE Output Latch Value bits⁽¹⁾
Note 1: Writes to PORTE are actually written to corresponding LATE register. Reads from PORTE register is return of
actual I/O pin values.
REGISTER 12-19: ANSELE: PORTE ANALOG SELECT REGISTER
R/W-1
ANSE7
bit 7
R/W-1
ANSE6
R/W-1
ANSE5
R/W-1
ANSE4
R/W-1
ANSE3
R/W-1
ANSE2
R/W-1
ANSE1
R/W-1
ANSE0
bit 0
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ANSE<7:0>: Analog Select between Analog or Digital Function on Pins RE<7:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input⁽¹⁾. Digital input buffer disabled.
Note 1: When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow
external control of the voltage on the pin.
TABLE 12-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
APFCON
P3CSEL P3BSEL P2DSEL P2CSEL P2BSEL CCP2SEL P1CSEL P1BSEL
122
ANSELE
ANSE7 ANSE6 ANSE5 ANSE4 ANSE3 ANSE2
ANSE1
ANSE0
137
CCPxCON
PxM<1:0>⁽¹⁾
DCxB<1:0>
CCPxM<3:0>
229
LATE
LATE7
LATE6
LATE5
LATE4
LATE3
LATE2
LATE1
LATE0
137
LCDCON
LCDEN SLPEN WERR
—
CS<1:0>
LMUX<1:0>
329
LCDREF
LCDIRE LCDIRS LCDIRI
—
VLCD3PE VLCD2PE VLCD1PE
—
331
LCDSE2
SE31
SE30
SE29
SE28
SE27
SE26
SE25
SE24
333
PORTE
RE7
RE6
RE5
RE4
RE3
RE2
RE1
RE0
136
TRISE
TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0
136
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTE.
Note 1: Applies to ECCP modules only.
 2010 Microchip Technology Inc.
Preliminary
DS41414A-page 137