PIC18F452-IPT Datasheet, PDF (86/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
8.5 RCON Register
The RCON register contains the bit which is used to
enable prioritized interrupts (IPEN).
REGISTER 8-10: RCON REGISTER
R/W-0
U-0
U-0
IPEN
—
—
bit 7
R/W-1
R-1
RI
TO
R-1 R/W-0 R/W-0
PD
POR
BOR
bit 0
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX Compatibility mode)
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-3
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-3
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-3
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-3
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-3
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS39564C-page 84
© 2006 Microchip Technology Inc.