PIC18F452-IPT Datasheet, PDF (200/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
REGISTER 19-4: CONFIGURATION REGISTER 3 HIGH (CONFIG3H: BYTE ADDRESS 300005h)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/P-1
—
—
—
—
—
—
—
CCP2MX
bit 7
bit 0
bit 7-1
bit 0
Unimplemented: Read as ‘0’
CCP2MX: CCP2 Mux bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
Legend:
R = Readable bit
P = Programmable bit
- n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
REGISTER 19-5: CONFIGURATION REGISTER 4 LOW (CONFIG4L: BYTE ADDRESS 300006h)
R/P-1
U-0
BKBUG
—
bit 7
U-0
U-0
U-0
R/P-1
U-0
R/P-1
—
—
—
LVP
—
STVREN
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
DEBUG: Background Debugger Enable bit
1 = Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
Unimplemented: Read as ‘0’
LVP: Low Voltage ICSP Enable bit
1 = Low Voltage ICSP enabled
0 = Low Voltage ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack Full/Underflow will cause RESET
0 = Stack Full/Underflow will not cause RESET
Legend:
R = Readable bit
C = Clearable bit
- n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
DS39564C-page 198
© 2006 Microchip Technology Inc.