PIC18F452-IPT Datasheet, PDF (203/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
REGISTER 19-10: CONFIGURATION REGISTER 7 LOW (CONFIG7L: BYTE ADDRESS 30000Ch)
U-0
U-0
U-0
U-0
R/C-1
R/C-1 R/C-1 R/C-1
—
—
—
—
EBTR3⁽¹⁾ EBTR2⁽¹⁾ EBTR1 EBTR0
bit 7
bit 0
bit 7-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit⁽¹⁾
1 = Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks
0 = Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks
EBTR2: Table Read Protection bit⁽¹⁾
1 = Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks
0 = Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks
0 = Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks
0 = Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks
Note 1: Unimplemented in PIC18FX42 devices; maintain this bit set.
Legend:
R = Readable bit
C = Clearable bit
- n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
REGISTER 19-11: CONFIGURATION REGISTER 7 HIGH (CONFIG7H: BYTE ADDRESS 30000Dh)
U-0
R/C-1
U-0
U-0
U-0
U-0
U-0
U-0
—
EBTRB
—
—
—
—
—
—
bit 7
bit 0
bit 7
bit 6
bit 5-0
Unimplemented: Read as ‘0’
EBTRB: Boot Block Table Read Protection bit
1 = Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks
0 = Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
C =Clearable bit
- n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
© 2006 Microchip Technology Inc.
DS39564C-page 201