PIC18F452-IPT Datasheet, PDF (127/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

15.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
15.1 Master SSP (MSSP) Module
Overview
The Master Synchronous Serial Port (MSSP) module is
a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I²C)
- Full Master mode
- Slave mode (with general address call)
The I²C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
15.2 Control Registers
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I²C mode.
Additional details are provided under the individual
sections.
PIC18FXX2
15.3 SPI Mode
The SPI mode allows 8-bits of data to be synchronously
transmitted and received, simultaneously. All four modes
of SPI are supported. To accomplish communication,
typically three pins are used:
• Serial Data Out (SDO) - RC5/SDO
• Serial Data In (SDI) - RC4/SDI/SDA
• Serial Clock (SCK) - RC3/SCK/SCL/LVDIN
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) - RA5/SS/AN4
Figure 15-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 15-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Internal
Data Bus
Read
Write
SSPBUF reg
RC4/SDI/SDA
RC5/SDO
SSPSR reg
bit0
shift
clock
RA5/SS/AN4
RC3/SCK/
SCL/LVDIN
SS Control
Enable
Edge
Select
2
Clock Select
SSPM3:SSPM0
SMP:CKE ₄
2
( ) TMR2 output
2
Edge
Select
Prescaler TOSC
4, 16, 64
Data to TX/RX in SSPSR
TRIS bit
© 2006 Microchip Technology Inc.
DS39564C-page 125