PIC18F452-IPT Datasheet, PDF (85/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
REGISTER 8-9:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
U-0
U-0
U-0
R/W-1 R/W-1 R/W-1
—
—
—
EEIP
BCLIP LVDIP
bit 7
R/W-1
TMR3IP
R/W-1
CCP2IP
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
EEIP: Data EEPROM/FLASH Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
LVDIP: Low Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
© 2006 Microchip Technology Inc.
DS39564C-page 83