PIC18F452-IPT Datasheet, PDF (83/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
REGISTER 8-7:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
U-0
U-0
U-0
R/W-0 R/W-0 R/W-0
—
—
—
EEIE
BCLIE LVDIE
bit 7
R/W-0
TMR3IE
R/W-0
CCP2IE
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
EEIE: Data EEPROM/FLASH Write Operation Interrupt Enable bit
1 = Enabled
0 = Disabled
BCLIE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
LVDIE: Low Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enables the TMR3 overflow interrupt
0 = Disables the TMR3 overflow interrupt
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
© 2006 Microchip Technology Inc.
DS39564C-page 81