PIC18F452-IPT Datasheet, PDF (288/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
FIGURE 22-20: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
121
121
120
122
Note: Refer to Figure 22-4 for load conditions.
TABLE 22-19: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max
120 TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
PIC18FXXX
—
50
PIC18LFXXX —
150
121 Tckr
Clock out rise time and fall time
PIC18FXXX
—
25
(Master mode)
PIC18LFXXX —
60
122 Tdtr
Data out rise time and fall time
PIC18FXXX
—
25
PIC18LFXXX —
60
Units Conditions
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
ns VDD = 2V
FIGURE 22-21: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 22-4 for load conditions.
TABLE 22-20: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
125 TdtV2ckl SYNC RCV (MASTER & SLAVE)
Data hold before CK ↓ (DT hold time)
10
126 TckL2dtl Data hold after CK ↓ (DT hold time) PIC18FXXX
15
PIC18LFXXX
20
Max Units Conditions
—
ns
—
ns
—
ns VDD = 2V
DS39564C-page 286
© 2006 Microchip Technology Inc.