PIC18F2220 Datasheet, PDF (66/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
TABLE 5-2: REGISTER FILE SUMMARY (PIC18F2220/2320/4220/4320) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details on
POR, BOR page:
EEADR
EEDATA
EECON2
EECON1
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE⁽⁵⁾
TRISD⁽⁵⁾
TRISC
TRISB
TRISA
LATE⁽⁵⁾
LATD⁽⁵⁾
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
Legend:
Note 1:
2:
3:
4:
5:
6:
EEPROM Address Register
0000 0000 48, 81
EEPROM Data Register
0000 0000 48, 84
EEPROM Control Register 2 (not a physical register)
0000 0000 48, 72, 81
EEPGD
CFGS
—
FREE
WRERR
WREN
WR
RD
xx-0 x000 48, 73, 82
OSCFIP
CMIP
—
EEIP
BCLIP
LVDIP
TMR3IP CCP2IP 11-1 1111 49, 97
OSCFIF
CMIF
—
EEIF
BCLIF
LVDIF
TMR3IF CCP2IF 00-0 0000 49, 93
OSCFIE
PSPIP⁽⁵⁾
PSPIF⁽⁵⁾
PSPIE⁽⁵⁾
CMIE
ADIP
ADIF
ADIE
—
RCIP
RCIF
RCIE
EEIE
TXIP
TXIF
TXIE
BCLIE
SSPIP
SSPIF
SSPIE
LVDIE
CCP1IP
CCP1IF
CCP1IE
TMR3IE
TMR2IP
TMR2IF
TMR2IE
CCP2IE
TMR1IP
TMR1IF
TMR1IE
00-0 0000
1111 1111
0000 0000
0000 0000
49, 95
49, 96
49, 92
49, 94
—
—
TUN5
TUN4
TUN3
TUN2
TUN1
TUN0 --00 0000 23, 49
IBF
OBF
IBOV PSPMODE
—
Data Direction bits for PORTE⁽⁵⁾
0000 -111 49, 112
Data Direction Control Register for PORTD
1111 1111 49, 110
Data Direction Control Register for PORTC
1111 1111 49, 108
Data Direction Control Register for PORTB
TRISA7⁽²⁾ TRISA6⁽¹⁾ Data Direction Control Register for PORTA
1111 1111
1111 1111
49, 106
49, 103
—
—
—
—
—
Read/Write PORTE Data Latch
---- -xxx 49, 113
Read/Write PORTD Data Latch
xxxx xxxx 49, 110
Read/Write PORTC Data Latch
xxxx xxxx 49, 108
Read/Write PORTB Data Latch
LATA<7>⁽²⁾ LATA<6>⁽¹⁾ Read/Write PORTA Data Latch
—
—
—
—
RE3⁽⁶⁾
Read PORTE pins,
Write PORTE Data Latch⁽⁵⁾
xxxx xxxx
xxxx xxxx
---- xxxx
49, 106
49, 103
49, 113
Read PORTD pins, Write PORTD Data Latch
xxxx xxxx 49, 110
Read PORTC pins, Write PORTC Data Latch
Read PORTB pins, Write PORTB Data Latch⁽⁴⁾
RA7⁽²⁾
RA6⁽¹⁾ Read PORTA pins, Write PORTA Data Latch
xxxx xxxx
xxxx xxxx
xx0x 0000
49, 108
49, 106
49, 103
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO, ECIO and INTIO2 (with port function on RA6) Oscillator mode only and read
‘0’ in all other oscillator modes.
RA7 and associated bits are configured as port pins in INTIO2 Oscillator mode only and read ‘0’ in all other modes.
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
If PBADEN = 0, PORTB<4:0> are configured as digital input and read unknown and if PBADEN = 1, PORTB<4:0> are configured as
analog input and read ‘0’ following a Reset.
These registers and/or bits are not implemented on the PIC18F2X20 devices and read as ‘0’.
The RE3 port bit is only available when MCLRE fuse (CONFIG3H<7>) is programmed to ‘0’. Otherwise, RE3 reads ‘0’. This bit is
read-only.
DS39599C-page 64
 2003 Microchip Technology Inc.