PIC18F2220 Datasheet, PDF (147/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
16.4.2 HALF-BRIDGE MODE
In the Half-Bridge Output mode, two pins are used as
outputs to drive push-pull loads. The PWM output sig-
nal is output on the RC2/CCP1/P1A pin, while the com-
plementary PWM output signal is output on the RD5/
PSP5/P1B pin (Figure 16-4). This mode can be used
for half-bridge applications, as shown in Figure 16-5, or
for full-bridge applications where four power switches
are being modulated with two PWM signals.
In Half-Bridge Output mode, the programmable dead
band delay can be used to prevent shoot-through
current in half-bridge power devices. The value of bits
PDC6:PDC0 sets the number of instruction cycles
before the output is driven active. If the value is greater
than the duty cycle, the corresponding output remains
inactive during the entire cycle. See Section 16.4.4
“Programmable Dead Band Delay” for more details
of the dead band delay operations.
Since the P1A and P1B outputs are multiplexed with
the PORTC<2> and PORTD<5> data latches, the
TRISC<2> and TRISD<5> bits must be cleared to
configure P1A and P1B as outputs.
FIGURE 16-4:
HALF-BRIDGE PWM
OUTPUT
Period
Period
Duty Cycle
P1A⁽²⁾
td
td
P1B⁽²⁾
(1)
(1)
(1)
td = Dead Band Delay
Note 1: At this time, the TMR2 register is equal to the PR2
register.
2: Output signals are shown as active-high.
FIGURE 16-5:
EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS
V+
Standard Half-Bridge Circuit (“Push-Pull”)
PIC18F4220/4320 _FET
Driver
+
P1A
V
-
FET
Driver
P1B
Load
+
V
-
Half-Bridge Output Driving a Full-Bridge Circuit
PIC18F4220/4320
P1A
P1B
FET
Driver
FET
Driver
V-
V+
Load
V-
FET
Driver
FET
Driver
 2003 Microchip Technology Inc.
DS39599C-page 145