PIC18F2220 Datasheet, PDF (344/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
FIGURE 26-23: A/D CONVERSION TIMING
BSF ADCON0, GO
(Note 2)
131
Q4
130
A/D CLK
132
A/D DATA
9
8 7 ^{... ...} 2
1
0
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
NEW_DATA
TCY
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be
executed.
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
TABLE 26-25: A/D CONVERSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min Max Units
Conditions
130 TAD
A/D Clock Period
PIC18FXX20
PIC18LFXX20
1.6
20⁽²⁾
µs TOSC based, VREF ≥ 3.0V
3.0
20⁽²⁾
µs TOSC based, VREF full range
PIC18FXX20
2.0
6.0
µs A/D RC mode
PIC18LFXX20
3.0
9.0
µs A/D RC mode
131 TCNV Conversion Time
(not including acquisition time)⁽¹⁾
11
12
TAD
Note 1: ADRES register may be read on the following TCY cycle.
2: The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
DS39599C-page 342
 2003 Microchip Technology Inc.