PIC18F2220 Datasheet, PDF (229/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
21.0 COMPARATOR VOLTAGE
REFERENCE MODULE
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable voltage refer-
ence. The resistor ladder is segmented to provide two
ranges of CVREF values and has a power-down func-
tion to conserve power when the reference is not being
used. The CVRCON register controls the operation of
the reference as shown in Register 21-1. The block
diagram is given in Figure 21-1.
The comparator reference supply voltage comes from
VDD and VSS.
21.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference can output 16 distinct
voltage levels for each range. The equations used to cal-
culate the output of the comparator voltage reference
are as follows:
EQUATION 21-1:
If CVRR = 1:
VDD
CVREF = (CVR<3:0>) • ₂₄
If CVRR = 0:
VDD
CVREF = (CVR<3:0> + 8) • ₃₂
The settling time of the comparator voltage reference
must be considered when changing the CVREF
output (see Table 26-2 in Section 26.0 “Electrical
Characteristics”).
REGISTER 21-1: CVRCON REGISTER
R/W-0 R/W-0 R/W-0
U-0
R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE CVRR
—
CVR3
CVR2
CVR1
CVR0
bit 7
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3-0
CVREN: Comparator Voltage Reference Enable bit
1 = CVREF circuit powered on
0 = CVREF circuit powered down
CVROE: Comparator VREF Output Enable bit
1 = CVREF voltage level is also output on the RA2/AN2/VREF-/CVREF⁽¹⁾ pin
0 = CVREF voltage is disconnected from the RA2/AN2/VREF-/CVREF pin
Note 1: CVROE overrides the TRISA<2> bit setting.
CVRR: Comparator VREF Range Selection bit
1 = 0.00 VDD to 0.75 VDD, with VDD/24 step size
0 = 0.25 VDD to 0.75 VDD, with VDD/32 step size
Unimplemented: Read as ‘0’
CVR3:CVR0: Comparator VREF Value Selection 0 ≤ VR3:VR0 ≤ 15 bits
When CVRR = 1:
CVREF = (CVR<3:0>) •
VDD
24
When CVRR = 0:
CVREF = 1/4 • (CVRSRC) + (CVR<3:0> + 8) •
VDD
32
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2003 Microchip Technology Inc.
DS39599C-page 227