|
PIC18F2220 Datasheet, PDF (270/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology | |||
|
◁ |
PIC18F2220/2320/4220/4320
BTFSC
Bit Test File, Skip if Clear
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] BTFSC f,b[,a]
0 ⤠f ⤠255
0â¤bâ¤7
a â [0,1]
skip if (f<b>) = 0
None
1011 bbba ffff ffff
If bit âbâ in register âfâ is â0â, then the
next instruction is skipped.
If bit âbâ is â0â, then the next instruc-
tion fetched during the current
instruction execution is discarded
and a NOP is executed instead, mak-
ing this a two-cycle instruction. If âaâ
is â0â, the Access Bank will be
selected, overriding the BSR value. If
âaâ = 1, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read Process Data
register âfâ
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
FALSE
TRUE
BTFSC
:
:
FLAG, 1
Before Instruction
PC
=
After Instruction
If FLAG<1> =
PC
=
If FLAG<1> =
PC
=
address (HERE)
0;
address (TRUE)
1;
address (FALSE)
BTFSS
Bit Test File, Skip if Set
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] BTFSS f,b[,a]
0 ⤠f ⤠255
0â¤b<7
a â [0,1]
skip if (f<b>) = 1
None
1010 bbba ffff ffff
If bit âbâ in register âfâ is â1â, then the
next instruction is skipped.
If bit âbâ is â1â, then the next instruc-
tion fetched during the current
instruction execution is discarded
and a NOP is executed instead, mak-
ing this a two-cycle instruction. If âaâ
is â0â, the Access Bank will be
selected, overriding the BSR value. If
âaâ = 1, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read Process Data
register âfâ
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
FALSE
TRUE
BTFSS
:
:
FLAG, 1
Before Instruction
PC
=
After Instruction
If FLAG<1> =
PC
=
If FLAG<1> =
PC
=
address (HERE)
0;
address (FALSE)
1;
address (TRUE)
DS39599C-page 268
 2003 Microchip Technology Inc.
|
▷ |