PIC18F2220 Datasheet, PDF(139/388 Page) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220 Datasheet, PDF (139/388 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220/2320/4220/4320

TABLE 15-3: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

Resets

INTCON

PIR1

PIE1

IPR1

GIE/GIEH PEIE/GIEL

PSPIF(1) ADIF

PSPIE(1) ADIE

PSPIP(1) ADIP

TMR0IE

RCIF

RCIE

RCIP

INT0IE

TXIF

TXIE

TXIP

RBIE

SSPIF

SSPIE

SSPIP

TMR0IF

CCP1IF

CCP1IE

CCP1IP

INT0IF

TMR2IF

TMR2IE

TMR2IP

RBIF 0000 000x 0000 000u

TMR1IF 0000 0000 0000 0000

TMR1IE 0000 0000 0000 0000

TMR1IP 1111 1111 1111 1111

TRISC PORTC Data Direction Register

1111 1111 1111 1111

TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

T1CON

RD16 T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu

CCPR1L Capture/Compare/PWM Register 1 (LSB)

xxxx xxxx uuuu uuuu

CCPR1H Capture/Compare/PWM Register 1 (MSB)

xxxx xxxx uuuu uuuu

CCP1CON â

â

DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000

CCPR2L Capture/Compare/PWM Register 2 (LSB)

xxxx xxxx uuuu uuuu

CCPR2H Capture/Compare/PWM Register 2 (MSB)

xxxx xxxx uuuu uuuu

CCP2CON â

â

DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000

PIR2

OSCFIF CMIF

â

EEIF

BCLIF LVDIF TMR3IF CCP2IF 00-0 0000 00-0 0000

PIE2

OSCFIE CMIE

â

EEIE

BCLIE LVDIE TMR3IE CCP2IE 00-0 0000 00-0 0000

IPR2

OSCFIP CMIP

â

EEIP

BCLIP LVDIP TMR3IP CCP2IP 11-1 1111 11-1 1111

TMR3L Holding Register for the Least Significant Byte of the 16-bit TMR3 Register

xxxx xxxx uuuu uuuu

TMR3H Holding Register for the Most Significant Byte of the 16-bit TMR3 Register

xxxx xxxx uuuu uuuu

T3CON

RD16 T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON 0000 0000 uuuu uuuu

Legend: x = unknown, u = unchanged, - = unimplemented, read as â0â. Shaded cells are not used by Capture and Timer1.

Note 1: These bits are reserved on the PIC18F2X20 devices; always maintain these bits clear.

ï£© 2003 Microchip Technology Inc.

DS39599C-page 137

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