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70592C Datasheet, PDF (55/314 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers
TABLE 4-28: PORTE REGISTER MAP(1)
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
TRISE
PORTE
LATE
Legend:
Note 1:
02D8
—
—
—
—
—
—
—
—
TRISE7 TRISE6 TRISE5
02DA
—
—
—
—
—
—
—
—
RE7
RE6
RE5
02DC
—
—
—
—
—
—
—
—
LATE7 LATE6 LATE5
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
The actual set of I/O port pins varies from one device to another. Please refer to the corresponding pinout diagrams.
Bit 4
TRISE4
RE4
LATE4
Bit 3
TRISE3
RE3
LATE3
Bit 2
TRISE2
RE2
LATE2
Bit 1
TRISE1
RE1
LATE1
Bit 0
TRISE0
RE0
LATE0
All
Resets
00FF
xxxx
xxxx
TABLE 4-29: PORTF REGISTER MAP(1)
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
TRISF
PORTF
LATF
ODCF(2)
Legend:
Note 1:
02DE
—
—
TRISF13 TRISF12
—
—
—
TRISF8 TRISF7 TRISF6 TRISF5
02E0
—
—
RF13
RF12
—
—
—
RF8
RF7
RF6
RF5
02E2
—
—
LATF13 LATF12
—
—
—
LATF8 LATF7 LATF6 LATF5
06DE
—
—
ODCF13 ODCF12
—
—
—
ODCF8 ODCF7 ODCF6 ODCF5
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
The actual set of I/O port pins varies from one device to another. Please refer to the corresponding pinout diagrams.
Bit 4
TRISF4
RF4
LATF4
ODCF4
Bit 3
TRISF3
RF3
LATF3
ODCF3
Bit 2
TRISF2
RF2
LATF2
ODCF2
Bit 1
TRISF1
RF1
LATF1
ODCF1
Bit 0 All Resets
TRISF0
RF0
LATF0
ODCF0
31FF
xxxx
xxxx
0000
TABLE 4-30: PORTG REGISTER MAP(1)
File Name Addr Bit 15
Bit 14
Bit 13
Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
TRISG
PORTG
LATG
ODCG(2)
Legend:
Note 1:
02E4 TRISG15 TRISG14 TRISG13 TRISG12
—
—
TRISG9 TRISG8 TRISG7 TRISG6
—
02E6 RG15
RG14
RG13
RG12
—
—
RG9
RG8
RG7
RG6
—
02E8 LATG15 LATG14 LATG13 LATG12
—
—
LATG9 LATG8 LATG7 LATG6
—
06E4 ODCG15 ODCG14 ODCG13 ODCG12
—
—
ODCG9 ODCG8 ODCG7 ODCG6
—
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for PinHigh devices.
The actual set of I/O port pins varies from one device to another. Please refer to the corresponding pinout diagrams.
Bit 4
—
—
—
—
Bit 3
TRISG3
RG3
LATG3
ODCG3
Bit 2
TRISG2
RG2
LATG2
ODCG2
Bit 1
TRISG1
RG1
LATG1
ODCG1
Bit 0
TRISG0
RG0
LATG0
ODCG0
All
Resets
F3CF
xxxx
xxxx
0000