70592C Datasheet, PDF (309/314 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers

PIC24HJXXXGPX06A/X08A/X10A
R
Reader Response ............................................................. 304
Registers
ADxCHS0 (ADCx Input Channel 0 Select................. 214
ADxCHS123 (ADCx Input Channel 1, 2, 3 Select) ... 213
ADxCON1 (ADCx Control 1)..................................... 208
ADxCON2 (ADCx Control 2)..................................... 210
ADxCON3 (ADCx Control 3)..................................... 211
ADxCON4 (ADCx Control 4)..................................... 212
ADxCSSH (ADCx Input Scan Select High)............... 215
ADxCSSL (ADCx Input Scan Select Low) ................ 215
ADxPCFGH (ADCx Port Configuration High) ........... 216
ADxPCFGL (ADCx Port Configuration Low)............. 216
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 192
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 193
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 193
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 194
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 190
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 191
CiCTRL1 (ECAN Control 1) ...................................... 182
CiCTRL2 (ECAN Control 2) ...................................... 183
CiEC (ECAN Transmit/Receive Error Count)............ 189
CiFCTRL (ECAN FIFO Control)................................ 185
CiFEN1 (ECAN Acceptance Filter Enable) ............... 192
CiFIFO (ECAN FIFO Status)..................................... 186
CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection)..... 196,
197
CiINTE (ECAN Interrupt Enable) .............................. 188
CiINTF (ECAN Interrupt Flag)................................... 187
CiRXFnEID (ECAN Acceptance Filter n
Extended Identifier)........................................... 195
CiRXFnSID (ECAN Acceptance Filter n Standard Identi-
fier).................................................................... 195
CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 199
CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 199
CiRXMnEID (ECAN Acceptance Filter Mask n Extended
Identifier) ........................................................... 198
CiRXMnSID (ECAN Acceptance Filter Mask n
Standard Identifier) ........................................... 198
CiRXOVF1 (ECAN Receive Buffer Overflow 1) ........ 200
CiRXOVF2 (ECAN Receive Buffer Overflow 2) ........ 200
CiTRBnDLC (ECAN Buffer n Data Length Control) .. 203
CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 202
CiTRBnSID (ECAN Buffer n Standard Identifier) ...... 202
CiTRBnSTAT (ECAN Receive Buffer n Status) ........ 204
CiTRmnCON (ECAN TX/RX Buffer m Control)......... 201
CiVEC (ECAN Interrupt Code).................................. 184
CLKDIV (Clock Divisor)............................................. 130
CORCON (Core Control) ...................................... 29, 76
DMACS0 (DMA Controller Status 0)......................... 121
DMACS1 (DMA Controller Status 1)......................... 123
DMAxCNT (DMA Channel x Transfer Count) ........... 120
DMAxCON (DMA Channel x Control) ....................... 117
DMAxPAD (DMA Channel x Peripheral Address)..... 120
DMAxREQ (DMA Channel x IRQ Select) ................. 118
DMAxSTA (DMA Channel x RAM Start Address A) . 119
DMAxSTB (DMA Channel x RAM Start Address B) . 119
DSADR (Most Recent DMA RAM Address).............. 124
I2CxCON (I2Cx Control) ........................................... 167
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 171
I2CxSTAT (I2Cx Status) ........................................... 169
ICxCON (Input Capture x Control) ............................ 154
IEC0 (Interrupt Enable Control 0) ............................... 87
IEC1 (Interrupt Enable Control 1) ............................... 89
IEC2 (Interrupt Enable Control 2) ............................... 91
© 2011 Microchip Technology Inc.
IEC3 (Interrupt Enable Control 3) ............................... 93
IEC4 (Interrupt Enable Control 4) ............................... 94
IFS0 (Interrupt Flag Status 0) ..................................... 79
IFS1 (Interrupt Flag Status 1) ..................................... 81
IFS2 (Interrupt Flag Status 2) ..................................... 83
IFS3 (Interrupt Flag Status 3) ..................................... 85
IFS4 (Interrupt Flag Status 4) ..................................... 86
INTCON1 (Interrupt Control 1) ................................... 77
INTCON2 (Interrupt Control 2) ................................... 78
IPC0 (Interrupt Priority Control 0) ............................... 95
IPC1 (Interrupt Priority Control 1) ............................... 96
IPC10 (Interrupt Priority Control 10) ......................... 105
IPC11 (Interrupt Priority Control 11) ......................... 106
IPC12 (Interrupt Priority Control 12) ......................... 107
IPC13 (Interrupt Priority Control 13) ......................... 108
IPC14 (Interrupt Priority Control 14) ......................... 109
IPC15 (Interrupt Priority Control 15) ......................... 109
IPC16 (Interrupt Priority Control 16) ................. 110, 112
IPC17 (Interrupt Priority Control 17) ......................... 111
IPC2 (Interrupt Priority Control 2) ............................... 97
IPC3 (Interrupt Priority Control 3) ............................... 98
IPC4 (Interrupt Priority Control 4) ............................... 99
IPC5 (Interrupt Priority Control 5) ............................. 100
IPC6 (Interrupt Priority Control 6) ............................. 101
IPC7 (Interrupt Priority Control 7) ............................. 102
IPC8 (Interrupt Priority Control 8) ............................. 103
IPC9 (Interrupt Priority Control 9) ............................. 104
NVMCON (Flash Memory Control)............................. 63
OCxCON (Output Compare x Control) ..................... 157
OSCCON (Oscillator Control)................................... 128
OSCTUN (FRC Oscillator Tuning)............................ 132
PLLFBD (PLL Feedback Divisor) ............................. 131
PMD1 (Peripheral Module Disable Control
Register 1) ........................................................ 137
PMD2 (Peripheral Module Disable Control
Register 2) ........................................................ 139
PMD3 (Peripheral Module Disable Control
Register 3) ........................................................ 141
RCON (Reset Control)................................................ 68
SPIxCON1 (SPIx Control 1) ..................................... 161
SPIxCON2 (SPIx Control 2) ..................................... 163
SPIxSTAT (SPIx Status and Control) ....................... 160
SR (CPU Status) .................................................. 28, 76
T1CON (Timer1 Control) .......................................... 146
TxCON (T2CON, T4CON, T6CON or
T8CON Control)................................................ 150
TyCON (T3CON, T5CON, T7CON or
T9CON Control)................................................ 151
UxMODE (UARTx Mode) ......................................... 174
UxSTA (UARTx Status and Control) ........................ 176
Reset
Clock Source Selection .............................................. 69
Special Function Register Reset States ..................... 70
Times.......................................................................... 69
Reset Sequence ................................................................. 71
Resets ................................................................................ 67
S
Serial Peripheral Interface (SPI) ....................................... 159
Software Simulator (MPLAB SIM) .................................... 235
Software Stack Pointer, Frame Pointer
CALL Stack Frame ..................................................... 55
Special Features............................................................... 217
SPI Module
SPI1 Register Map ..................................................... 43
SPI2 Register Map ..................................................... 43
DS70592C-page 309