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70592C Datasheet, PDF (150/314 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers
PIC24HJXXXGPX06A/X08A/X10A
A block diagram for a 32-bit timer pair (Timer4/5)
example is shown in Figure 13-1 and a timer (Timer4)
operating in 16-bit mode example is shown in
Figure 13-2.
Note: Only Timer2 and Timer3 can trigger a
DMA data transfer.
FIGURE 13-1:
TIMER2/3 (32-BIT) BLOCK DIAGRAM(1)
T2CK
TGATE
Gate
Sync
TCY
1
Set T3IF
0
QD
Q CK
PR3
PR2
ADC Event Trigger(2) Equal
Comparator
MSb
LSb
Reset
TMR3
16
Read TMR2
Write TMR2
16
TMR3HLD
TMR2
16
16
Data Bus<15:0>
TON
1x
01
TCKPS<1:0>
2
Prescaler
1, 8, 64, 256
00
TGATE
TCS
Sync
Note 1:
2:
The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective
to the T2CON register.
The ADC event trigger is available only on Timer2/3.
DS70592C-page 150
© 2011 Microchip Technology Inc.