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PIC16F882_09 Datasheet, PDF (271/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology | |||
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PIC16F882/883/884/886/887
TABLE 17-14: SPI MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min. Typâ Max. Units Conditions
70* TSSL2SCH, SSâ to SCKâ or SCKâ input
TSSL2SCL
TCY
â â ns
71* TSCH
SCK input high time (Slave mode)
TCY + 20 â â ns
72* TSCL
SCK input low time (Slave mode)
TCY + 20 â â ns
73* TDIV2SCH, Setup time of SDI data input to SCK edge
TDIV2SCL
100
â â ns
74* TSCH2DIL, Hold time of SDI data input to SCK edge
TSCL2DIL
100
â â ns
75* TDOR
SDO data output rise time
3.0-5.5V
â
10 25 ns
2.0-5.5V
â
25 50 ns
76* TDOF
SDO data output fall time
â
10 25 ns
77* TSSH2DOZ SSâ to SDO output high-impedance
10
â 50 ns
78* TSCR
SCK output rise time
(Master mode)
3.0-5.5V
2.0-5.5V
â
10 25 ns
â
25 50 ns
79* TSCF
SCK output fall time (Master mode)
â
10 25 ns
80* TSCH2DOV, SDO data output valid after
TSCL2DOV SCK edge
3.0-5.5V
2.0-5.5V
â
â 50 ns
â
â 145 ns
81* TDOV2SCH, SDO data output setup to SCK edge
TDOV2SCL
Tcy
â â ns
82* TSSL2DOV SDO data output valid after SSâ edge
â
â 50 ns
83* TSCH2SSH, SS â after SCK edge
TSCL2SSH
1.5TCY + 40 â â ns
* These parameters are characterized but not tested.
â Data in âTypâ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 17-18: I2C⢠BUS START/STOP BITS TIMING
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 17-3 for load conditions.
Stop
Condition
© 2009 Microchip Technology Inc.
DS41291F-page 269
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