PIC16F882_09 Datasheet, PDF (130/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F882/883/884/886/887
11.5 PWM Mode
The PWM mode generates a Pulse-Width Modulated
signal on the CCPx pin. The duty cycle, period and
resolution are determined by the following registers:
• PR2
• T2CON
• CCPRxL
• CCPxCON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin. Since the CCPx pin is multiplexed
with the PORT data latch, the TRIS for that pin must be
cleared to enable the CCPx pin output driver.
Note: Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.
Figure 11-3 shows a simplified block diagram of PWM
operation.
Figure 11-4 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 11.5.7
“Setup for PWM Operation”.
FIGURE 11-3:
SIMPLIFIED PWM BLOCK
DIAGRAM
Duty Cycle Registers
CCPRxL
CCPxCON<5:4>
The PWM output (Figure 11-4) has a time base
(period) and a time that the output stays high (duty
cycle).
FIGURE 11-4:
Period
CCP PWM OUTPUT
Pulse Width
TMR2 = 0
TMR2 = PR2
TMR2 = CCPRxL:CCPxCON<5:4>
CCPRxH⁽²⁾ (Slave)
Comparator
RQ
CCPx
TMR2
(1)
S
TRIS
Comparator
PR2
Clear Timer2,
toggle CCPx pin and
latch duty cycle
Note 1:
2:
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (FOSC), or
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
DS41291F-page 128
© 2009 Microchip Technology Inc.