PIC16F882_09 Datasheet, PDF (220/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F882/883/884/886/887
TABLE 14-4: INITIALIZATION CONDITION FOR REGISTER (CONTINUED)
Register
Address
Power-on
Reset
MCLR Reset
WDT Reset (Continued)
Brown-out Reset⁽¹⁾
Wake-up from Sleep through
Interrupt
Wake-up from Sleep through
WDT Time-out (Continued)
CCPR2H
1Ch
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON
1Dh
--00 0000
--00 0000
--uu uuuu
ADRESH
1Eh
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
1Fh
00-0 0000
00-0 0000
uu-u uuuu
OPTION_REG 81h/181h 1111 1111
1111 1111
uuuu uuuu
TRISA
85h
1111 1111
1111 1111
uuuu uuuu
TRISB
86h/186h 1111 1111
1111 1111
uuuu uuuu
TRISC
87h
1111 1111
1111 1111
uuuu uuuu
TRISD
88h
1111 1111
1111 1111
uuuu uuuu
TRISE
89h
---- 1111
---- 1111
---- uuuu
PIE1
8Ch
0000 0000
0000 0000
uuuu uuuu
PIE2
PCON
8Dh
0000 0000
8Eh
--01 --0x
0000 0000
--0u --uu^{(1, 5)}
uuuu uuuu
--uu --uu
OSCCON
8Fh
-110 q000
-110 q000
-uuu uuuu
OSCTUNE
90h
---0 0000
---u uuuu
---u uuuu
SSPCON2
91h
0000 0000
0000 0000
uuuu uuuu
PR2
SSPADD⁽⁶⁾
SSPMSK⁽⁶⁾
92h
1111 1111
93h
0000 0000
93h
1111 1111
1111 1111
0000 0000
1111 1111
1111 1111
uuuu uuuu
1111 1111
SSPSTAT
94h
0000 0000
0000 0000
uuuu uuuu
WPUB
95h
1111 1111
1111 1111
uuuu uuuu
IOCB
96h
0000 0000
0000 0000
uuuu uuuu
VRCON
97h
0000 0000
0000 0000
uuuu uuuu
TXSTA
98h
0000 -010
0000 -010
uuuu -uuu
SPBRG
99h
0000 0000
0000 0000
uuuu uuuu
SPBRGH
9Ah
0000 0000
0000 0000
uuuu uuuu
PWM1CON
9Bh
0000 0000
0000 0000
uuuu uuuu
ECCPAS
9Ch
0000 0000
0000 0000
uuuu uuuu
PSTRCON
9Dh
---0 0001
---0 0001
---u uuuu
ADRESL
9Eh
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON1
9Fh
0-00 ----
0-00 ----
u-uu ----
WDTCON
105h
---0 1000
---0 1000
---u uuuu
CM1CON0
107h
0000 0-00
0000 0-00
uuuu u-uu
CM2CON0
108h
0000 0-00
0000 0-00
uuuu u-uu
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 14-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Accessible only when SSPCON register bits SSPM<3:0> = 1001.
DS41291F-page 218
© 2009 Microchip Technology Inc.