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| PIC16F882_09 Datasheet, PDF (223/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology | |||
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PIC16F882/883/884/886/887
14.3.2 TIMER0 INTERRUPT
An overflow (FFh â 00h) in the TMR0 register will set
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 âTimer0 Moduleâ for operation of
the Timer0 module.
FIGURE 14-7:
IOC-RB0
IOCB0
IOC-RB1
IOCB1
IOC-RB2
IOCB2
IOC-RB3
IOCB3
IOC-RB4
IOCB4
IOC-RB5
IOCB5
IOC-RB6
IOCB6
IOC-RB7
IOCB7
INTERRUPT LOGIC
BCLIF
BCLIE
SSPIF
SSPIE
TXIF
TXIE
RCIF
RCIE
TMR2IF
TMR2IE
TMR1IF
TMR1IE
C1IF
C1IE
C2IF
C2IE
ADIF
ADIE
EEIF
EEIE
OSFIF
OSFIE
CCP1IF
CCP1IE
CCP2IF
CCP2IE
ULPWUIF
ULPWUIE
14.3.3 PORTB INTERRUPT
An input change on PORTB change sets the RBIF
(INTCON<0>) bit. The interrupt can be
enabled/disabled by setting/clearing the RBIE
(INTCON<3>) bit. Plus, individual pins can be
configured through the IOCB register.
Note:
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt flag may not get set. See
Section 3.4.3 âInterrupt-on-Changeâ for
more information.
T0IF
T0IE
INTF
INTE
RBIF
RBIE
PEIE
GIE
Wake-up (If in Sleep mode)(1)
Interrupt to CPU
Note 1:
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 14.6.1
âWake-up from Sleepâ.
© 2009 Microchip Technology Inc.
DS41291F-page 221
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