PIC16F882_09 Datasheet, PDF (221/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F882/883/884/886/887
TABLE 14-4: INITIALIZATION CONDITION FOR REGISTER (CONTINUED)
Register
Address
Power-on
Reset
MCLR Reset
WDT Reset (Continued)
Brown-out Reset⁽¹⁾
Wake-up from Sleep through
Interrupt
Wake-up from Sleep through
WDT Time-out (Continued)
CM2CON1
109h
0000 0--0
0000 0--0
uuuu u--u
EEDAT
10Ch
0000 0000
0000 0000
uuuu uuuu
EEADR
10Dh
0000 0000
0000 0000
uuuu uuuu
EEDATH
10Eh
--00 0000
--00 0000
--uu uuuu
EEADRH
10Fh
---0 0000
---0 0000
---u uuuu
SRCON
185h
0000 00-0
0000 00-0
uuuu uu-u
BAUDCTL
187h
01-0 0-00
01-0 0-00
uu-u u-uu
ANSEL
188h
1111 1111
1111 1111
uuuu uuuu
ANSELH
189h
1111 1111
1111 1111
uuuu uuuu
EECON1
18Ch
---- x000
---- q000
---- uuuu
EECON2
18Dh
---- ----
---- ----
---- ----
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 14-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Accessible only when SSPCON register bits SSPM<3:0> = 1001.
TABLE 14-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS
Condition
Program
Counter
Status
Register
PCON
Register
Power-on Reset
000h
0001 1xxx
--01 --0x
MCLR Reset during normal operation
000h
000u uuuu
--0u --uu
MCLR Reset during Sleep
000h
0001 0uuu
--0u --uu
WDT Reset
000h
0000 uuuu
--0u --uu
WDT Wake-up
PC + 1
uuu0 0uuu
--uu --uu
Brown-out Reset
Interrupt Wake-up from Sleep
000h
PC + 1⁽¹⁾
0001 1uuu
uuu1 0uuu
--01 --u0
--uu --uu
Legend: u = unchanged, x = unknown, — = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
© 2009 Microchip Technology Inc.
DS41291F-page 219