PIC16F882_09 Datasheet, PDF (208/328 Pages) Microchip Technology – 28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F882/883/884/886/887
13.4.16.2 Bus Collision During a Repeated
Start Condition
During a Repeated Start condition, a bus collision
occurs if:
a) A low level is sampled on SDA when SCL goes
from low level to high level.
b) SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to trans-
mit a data ’1’.
When the user de-asserts SDA and the pin is allowed
to float high, the BRG is loaded with SSPADD<6:0>
and counts down to 0. The SCL pin is then de-asserted,
and when sampled high, the SDA pin is sampled.
If SDA is low, a bus collision has occurred (i.e, another
master is attempting to transmit a data ‘0’, see
Figure 13-24). If SDA is sampled high, the BRG is
reloaded and begins counting. If SDA goes from high-
to-low before the BRG times out, no bus collision
occurs because no two masters can assert SDA at
exactly the same time.
If SCL goes from high-to-low before the BRG times out
and SDA has not already been asserted, a bus collision
occurs. In this case, another master is attempting to
transmit a data ‘1’ during the Repeated Start condition
(Figure 13-25).
If at the end of the BRG time-out, both SCL and SDA are
still high, the SDA pin is driven low and the BRG is
reloaded and begins counting. At the end of the count,
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is complete.
FIGURE 13-24: BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
SDA
SCL
RSEN
Sample SDA when SCL goes high,
If SDA = 0, set BCLIF and release SDA and SCL
BCLIF
S
SSPIF
Cleared in software
‘0’
‘0’
FIGURE 13-25:
SDA
SCL
BCLIF
RSEN
S
SSPIF
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
TBRG
TBRG
SCL goes low before SDA,
Set BCLIF, release SDA and SCL
Interrupt cleared
in software
‘0’
DS41291F-page 206
© 2009 Microchip Technology Inc.