PIC18F6520-I Datasheet, PDF (88/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 8-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES3:RES0.
EQUATION 8-1:
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0 = ARG1H:ARG1L • ARG2H:ARG2L
= (ARG1H • ARG2H • 2¹⁶) +
(ARG1H • ARG2L • 2⁸) +
(ARG1L • ARG2H • 2⁸) +
(ARG1L • ARG2L)
EXAMPLE 8-3:
16 x 16 UNSIGNED
MULTIPLY ROUTINE
MOVF ARG1L, W
MULWF ARG2L
; ARG1L * ARG2L ->
; PRODH:PRODL
MOVFF PRODH, RES1 ;
MOVFF PRODL, RES0 ;
;
MOVF ARG1H, W
MULWF ARG2H
; ARG1H * ARG2H ->
; PRODH:PRODL
MOVFF PRODH, RES3 ;
MOVFF PRODL, RES2 ;
;
MOVF ARG1L, W
MULWF ARG2H
; ARG1L * ARG2H ->
; PRODH:PRODL
MOVF PRODL, W ;
ADDWF RES1, F
; Add cross
MOVF PRODH, W
; products
ADDWFC RES2, F
;
CLRF WREG
;
ADDWFC RES3, F
;
;
MOVF ARG1H, W
;
MULWF ARG2L
; ARG1H * ARG2L ->
; PRODH:PRODL
MOVF PRODL, W
;
ADDWF RES1, F
; Add cross
MOVF PRODH, W
; products
ADDWFC RES2, F
;
CLRF WREG
;
ADDWFC RES3, F
;
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pairs’ Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
EQUATION 8-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0
= ARG1H:ARG1L • ARG2H:ARG2L
= (ARG1H • ARG2H • 2¹⁶) +
(ARG1H • ARG2L • 2⁸) +
(ARG1L • ARG2H • 2⁸) +
(ARG1L • ARG2L) +
(-1 • ARG2H<7> • ARG1H:ARG1L • 2¹⁶) +
(-1 • ARG1H<7> • ARG2H:ARG2L • 2¹⁶)
EXAMPLE 8-4:
16 x 16 SIGNED
MULTIPLY ROUTINE
MOVF ARG1L, W
MULWF ARG2L
MOVFF PRODH, RES1
MOVFF PRODL, RES0
;
MOVF ARG1H, W
MULWF ARG2H
MOVFF PRODH, RES3
MOVFF PRODL, RES2
;
MOVF ARG1L, W
MULWF ARG2H
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
;
MOVF ARG1H, W
MULWF ARG2L
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
;
SIGN_ARG1
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
;
CONT_CODE
:
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG2H, 7
SIGN_ARG1
ARG1L, W
RES2
ARG1H, W
RES3
ARG1H, 7
CONT_CODE
ARG2L, W
RES2
ARG2H, W
RES3
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
; ARG1H:ARG1L neg?
; no, done
;
;
;
DS39609B-page 86
 2004 Microchip Technology Inc.