PIC18F6520-I Datasheet, PDF (231/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
21.0 COMPARATOR VOLTAGE
REFERENCE MODULE
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable voltage refer-
ence. The resistor ladder is segmented to provide two
ranges of CVREF values and has a power-down function
to conserve power when the reference is not being used.
The CVRCON register controls the operation of the
reference as shown in Register 21-1. The block diagram
is given in Figure 21-1.
The comparator reference supply voltage can come
from either VDD or VSS, or the external VREF+ and
VREF- that are multiplexed with RA3 and RA2. The
comparator reference supply voltage is controlled by
the CVRSS bit.
Note:
In order to select external VREF+ and VREF-
supply voltages, the Voltage Reference Con-
figuration bits (VCFG1:VCFG0) of the
ADCON1 register must be set appropriately.
21.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference can output 16 distinct
voltage levels for each range. The equations used to
calculate the output of the comparator voltage reference
are as follows:
If CVRR = 1:
CVREF = (CVR<3:0>/24) x CVRSRC
If CVRR = 0:
CVREF = (CVRSRC x 1/4) + (CVR<3:0>/32) x CVRSRC
The settling time of the comparator voltage reference
must be considered when changing the CVREF output
(Section 26.0 “Electrical Characteristics”).
REGISTER 21-1:
CVRCON REGISTER
R/W-0 R/W-0 R/W-0
CVREN CVROE CVRR
bit 7
R/W-0
CVRSS
R/W-0
CVR3
R/W-0
CVR2
R/W-0
CVR1
R/W-0
CVR0
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3-0
CVREN: Comparator Voltage Reference Enable bit
1 = CVREF circuit powered on
0 = CVREF circuit powered down
CVROE: Comparator VREF Output Enable bit⁽¹⁾
1 = CVREF voltage level is also output on the RF5/AN10/CVREF pin
0 = CVREF voltage is disconnected from the RF5/AN10/CVREF pin
CVRR: Comparator VREF Range Selection bit
1 = 0.00 CVRSRC to 0.667 CVRSRC, with CVRSRC/24 step size (low range)
0 = 0.25 CVRSRC to 0.75 CVRSRC, with CVRSRC/32 step size (high range)
CVRSS: Comparator VREF Source Selection bit⁽²⁾
1 = Comparator reference source CVRSRC = VREF+ – VREF-
0 = Comparator reference source CVRSRC = VDD – VSS
CVR3:CVR0: Comparator VREF Value Selection bits (0 ≤ VR3:VR0 ≤ 15)
When CVRR = 1:
CVREF = (CVR<3:0>/24) • (CVRSRC)
When CVRR = 0:
CVREF = 1/4 • (CVRSRC) + (CVR3:CVR0/32) • (CVRSRC)
Note 1: If enabled for output, RF5 must also be configured as an input by setting TRISF<5>
to ‘1’.
2: In order to select external VREF+ and VREF- supply voltages, the Voltage
Reference Configuration bits (VCFG1:VCFG0) of the ADCON1 register must be
set appropriately.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2004 Microchip Technology Inc.
DS39609B-page 229