PIC18F6520-I Datasheet, PDF (267/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
24.1 Instruction Set
ADDLW
ADD literal to W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] ADDLW k
0 ≤ k ≤ 255
(W) + k → W
N, OV, C, DC, Z
0000 1111 kkkk kkkk
The contents of W are added to the
8-bit literal ‘k’ and the result is
placed in W.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to W
Example:
ADDLW
Before Instruction
W = 0x10
After Instruction
W = 0x25
0x15
ADDWF
ADD W to f
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
[ label ] ADDWF
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) + (f) → dest
N, OV, C, DC, Z
f [,d [,a] f [,d [,a]
0010 01da ffff ffff
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected. If ‘a’ is ‘1’,
the BSR is used.
1
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
ADDWF
Before Instruction
W
REG
= 0x17
= 0xC2
After Instruction
W
REG
= 0xD9
= 0xC2
REG, 0, 0
 2004 Microchip Technology Inc.
DS39609B-page 265