PIC18F6520-I Datasheet, PDF (301/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
TSTFSZ
Test f, skip if 0
Syntax:
[ label ] TSTFSZ f [,a]
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
Operation:
skip if f = 0
Status Affected: None
Encoding:
0110 011a ffff ffff
Description:
If ‘f’ = 0, the next instruction,
fetched during the current
instruction execution is discarded
and a NOP is executed, making this
a two-cycle instruction. If ‘a’ is ‘0’,
the Access Bank will be selected,
overriding the BSR value. If ‘a’ is
‘1’, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Decode
Read
register ‘f’
If skip:
Q3
Process
Data
Q4
No
operation
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
No
operation
No
operation
Q2
No
operation
No
operation
Q3
No
operation
No
operation
Q4
No
operation
No
operation
Example:
HERE
NZERO
ZERO
TSTFSZ CNT, 1
:
:
Before Instruction
PC
=
After Instruction
If CNT
=
PC
=
If CNT
≠
PC
=
Address (HERE)
0x00,
Address (ZERO)
0x00,
Address (NZERO)
XORLW
Exclusive OR literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
[ label ] XORLW k
0 ≤ k ≤ 255
(W) .XOR. k → W
N, Z
0000 1010 kkkk kkkk
The contents of W are XOR’ed
with the 8-bit literal ‘k’. The result
is placed in W.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to W
Example:
XORLW 0xAF
Before Instruction
W
= 0xB5
After Instruction
W
= 0x1A
 2004 Microchip Technology Inc.
DS39609B-page 299