PIC18F6520-I Datasheet, PDF (29/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
If the main oscillator is configured for HS-PLL mode, an
oscillator start-up time (TOST), plus an additional PLL
time-out (TPLL), will occur. The PLL time-out is typically
2 ms and allows the PLL to lock to the main oscillator
frequency. A timing diagram, indicating the transition
from the Timer1 oscillator to the main oscillator for
HS-PLL mode, is shown in Figure 2-10.
FIGURE 2-10:
TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS WITH PLL)
Q4
Q1
TT1P
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
T1OSI
OSC1
OSC2
TOST
TPLL
PLL Clock
Input
Internal System
Clock
SCS
(OSCCON<0>)
Program Counter PC
TOSC
1
TSCS
23 4 56 78
PC + 2
PC + 4
Note 1: TOST = 1024 TOSC (drawing not to scale).
If the main oscillator is configured in the RC, RCIO, EC
or ECIO modes, there is no oscillator start-up time-out.
Operation will resume after eight cycles of the main
oscillator have been counted. A timing diagram,
indicating the transition from the Timer1 oscillator to the
main oscillator for RC, RCIO, EC and ECIO modes, is
shown in Figure 2-11.
FIGURE 2-11:
TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (RC, EC)
Q3
T1OSI
OSC1
OSC2
Internal System
Clock
SCS
(OSCCON<0>)
Program
Counter
Q4
Q1
PC
TT1P
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
TOSC
12 34 5 6 7 8
TSCS
PC + 2
PC + 4
Note 1: RC Oscillator mode assumed.
 2004 Microchip Technology Inc.
DS39609B-page 27