PIC18F6520-I Datasheet, PDF (339/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
FIGURE 26-22: MASTER SSP I²C BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 26-6 for load conditions.
Stop
Condition
TABLE 26-21: MASTER SSP I²C BUS START/STOP BITS REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Max Units
Conditions
90 TSU:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
Repeated Start condition
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
91 THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the first
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
clock pulse is generated
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
92
TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
93
THD:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
FIGURE 26-23:
SCL
SDA
In
SDA
Out
MASTER SSP I²C BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 26-6 for load conditions.
102
92
110
 2004 Microchip Technology Inc.
DS39609B-page 337