46DR83200A Datasheet, PDF (6/48 Pages) Integrated Silicon Solution, Inc – 32Mx8, 16Mx16 DDR2 DRAM

IS43/46DR83200A, IS43/46DR16160A
PIN CONFIGURATION
PACKAGE CODE: B 84 BALL TW-BGA (Top View) (8.00 mm x 12.50 mm Body, 0.8 mm Ball Pitch)
123456789
A
VDD NC VSS
B
DQ14 VSSQ UDM
C
VDDQ DQ9 VDDQ
D
DQ12 VSSQ DQ11
E
VDD NC VSS
F
DQ6 VSSQ LDM
G
VDDQ DQ1 VDDQ
H
DQ4 VSSQ DQ3
J
VDDL VREF VSS
K
CKE WE
L
NC BA0 BA1
M
A10/AP A1
N
VSS A3 A5
P
A7 A9
R
VDD A12 NC
Pin name
Function
A0 to A12
Address inputs
BA0, BA1
Bank select
DQ0 to DQ15 Data input/output
LDQS, UDQS Differential data strobe
/LDQS, /UDQS
/CS
Chip select
/RAS, /CAS, /WE Command input
CKE
Clock enable
CK, /CK
Differential clock input
LDM to UDM
Write data mask
6
VSSQ UDQS VDDQ
UDQS VSSQ DQ15
VDDQ DQ8 VDDQ
DQ10 VSSQ DQ13
VSSQ LDQS VDDQ
LDQS VSSQ DQ7
VDDQ DQ0 VDDQ
DQ2 VSSQ DQ5
VSSDL CK VDD
RAS CK ODT
CAS CS
A2 A0 VDD
A6 A4
A11 A8 VSS
NC NC
Not populated
Pin name
ODT
VDD
VSS
VDDQ
Function
ODT control
Supply voltage for internal circuit
Ground for internal circuit
Supply voltage for DQ circuit
VSSQ
VREF
VDDL
VSSDL
NC
Ground for DQ circuit
Input reference voltage
Supply voltage for DLL circuit
Ground for DLL circuit
No connection
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
08/16/2012