46DR83200A Datasheet, PDF (20/48 Pages) Integrated Silicon Solution, Inc – 32Mx8, 16Mx16 DDR2 DRAM

IS43/46DR83200A, IS43/46DR16160A
Timing parameters by speed grade (DDR2-667 and DDR2-800) cont'd
(For information related to the entries in this table, refer to both the Guidelines and the Specific Notes following this Table.)
Parameter
Symbol
Activate to activate command period tRRD
CAS to CAS command delay
Write recovery time
Auto precharge write recovery +
precharge time
Internal write to read command delay
Internal read to precharge command
delay
CKE minimum pulse width (HIGH and
LOW pulse width)
tCCD
tWR
tDAL
tWTR
tRTP
tCKE
Exit self refresh to a non-read command tXSNR
Exit self refresh to a read command
Exit precharge power down to any
command
Exit active power down to read
command
Exit active power down to read
command (slow exit, lower power)
tXSRD
tXP
tXARD
tXARDS
ODT turn-on delay
tAOND
ODT turn-on
tAON
ODT turn-on (Power-Down mode)
ODT turn-off delay
ODT turn-off
tAONPD
tAOFD
tAOF
ODT turn-off (Power-Down mode)
tAOFPD
ODT to power down entry latency
ODT Power Down Exit Latency
Mode register set command cycle time
tANPD
tAXPD
tMRD
DDR2-667
Min.
Max
7.5
–
2
–
15
–
WR + tnRP
–
7.5
–
7.5
–
DDR2-800
Min.
Max.
7.5
–
2
–
15
–
WR +
tnRP
–
7.5
–
7.5
–
Units Notes
ns 4,32
nCK
ns 32
nCK 33
ns 24, 32
ns 3, 32
3
tRFC + 10
200
2
2
–
3
–
–
tRFC + 10
–
–
200
–
–
2
–
–
2
–
nCK 27
ns 32
nCK
nCK
nCK 1
7 - AL
–
8 - AL
–
nCK 1, 2
2
2
tAC, min tAC,max + 0.7
tAC, min + 2
2 x tCK(avg) +
tAC,max + 1
2.5
2.5
tAC, min tAC,max + 0.6
tAC, min + 2
3
8
2
2.5 x tCK(avg)
+ tAC,max + 1
–
–
–
2
tAC,min
tAC,min
+2
2
tAC,max + 0.7
2 x tCK(avg) +
tAC,max + 1
nCK 16
ns
6, 16,
40
ns
2.5
2.5
nCK 17, 44
tAC,min tAC,max + 0.6
ns
17, 43,
44
tAC,min 2.5 x tCK(avg) +
+2
tAC,max + 1
ns
3
–
nCK
8
–
nCK
2
–
nCK
OCD drive mode output delay
tOIT
0
12
0
12
Minimum time clocks remains ON after
CKE asynchronously drops LOW
tDelay
tIS + tCK(avg)
+ tIH
–
tIS +
tCK(avg)
+ tIH
–
ns 32
ns 15
20
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
08/16/2012