46DR83200A Datasheet, PDF (19/48 Pages) Integrated Silicon Solution, Inc – 32Mx8, 16Mx16 DDR2 DRAM

IS43/46DR83200A, IS43/46DR16160A
Timing Parameters by Speed Grade (DDR2-667 and DDR2-800)
(For information related to the entries in this table, refer to both the Guidelines and the Specific Notes following this Table.)
Parameter
Average clock period
Average clock HIGH pulse width
Symbol
tCK(avg)
tCH(avg)
DDR2-667
Min.
Max.
3000
8000
0.48
0.52
DDR2-800
Min.
Max
2500
8000
0.48
0.52
Units
ps
tCK(avg)
Notes
35,36
35,36
Average clock LOW pulse width
tCL(avg)
0.48
0.52
0.48
0.52 tCK(avg) 35,36
DQS latching rising transitions to associated
clock edges
tDQSS
DQS falling edge to CK setup time
tDSS
DQS falling edge hold time from CK
tDSH
DQS input HIGH pulse width
tDQSH
DQS input LOW pulse width
tDQSL
Write preamble
tWPRE
Write postamble
tWPST
- 0.25
0.25
- 0.25
0.25
0.2
–
0.2
–
0.2
–
0.2
–
0.35
–
0.35
–
0.35
–
0.35
–
0.35
–
0.35
–
0.4
0.6
0.4
0.6
Address and control input setup time
tIS(base)
200
–
175
–
Address and control input hold time
tIH(base)
275
–
250
–
Control & Address input pulse width for each
input
tIPW
0.6
–
0.6
–
DQ and DM input setup time
tDS(base)
100
–
50
–
DQ and DM input hold time
tDH(base)
175
–
125
–
DQ and DM input pulse width for each input tDIPW
0.35
–
0.35
–
DQ output access time from CK/CK
tAC
- 450
450
- 400
400
DQS output access time from CK/CK
tDQSCK
- 400
400
- 350
350
Data-out high-impedance time from CK/CK tHZ
–
tAC,max
–
tAC,
max
DQS/DQS low-impedance time from CK/CK tLZ(DQS) tAC,min tAC,max tAC,min
tAC,
max
DQ low-impedance time from CK/CK
tLZ(DQ)
2 x tAC,min tAC,max 2 x tAC,min
tAC,
max
DQS-DQ skew for DQS and associated DQ
signals
tDQSQ
–
240
–
200
CK half pulse width
Min(
Min(
tHP
tCH(abs),
–
tCH(abs),
–
tCL(abs) )
tCL(abs) )
DQ hold skew factor
tQHS
–
340
–
300
DQ/DQS output hold time from DQS
tQH
tHP - tQHS – tHP - tQHS –
Read preamble
tRPRE
0.9
1.1
0.9
1.1
Read postamble
tRPST
0.4
0.6
0.4
0.6
tCK(avg) 30
tCK(avg) 30
tCK(avg) 30
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg) 10
ps
5, 7, 9, 22,
29
ps
5, 7, 9, 23,
29
tCK(avg)
ps
6, 7, 8, 20,
28, 31
ps
6, 7, 8, 21,
28, 31
tCK(avg)
ps
40
ps
40
ps
18,40
ps
18,40
ps
18,40
ps
13
ps
37
ps
ps
tCK(avg)
tCK(avg)
38
39
19,41
19,42
Integrated Silicon Solution, Inc. — www.issi.com
19
Rev. D
08/16/2012