46DR83200A Datasheet, PDF (41/48 Pages) Integrated Silicon Solution, Inc – 32Mx8, 16Mx16 DDR2 DRAM

IS43/46DR83200A, IS43/46DR16160A
TRUTH TABLES
Operation or timing that is not specified is illegal, and after such an event, in order to guarantee proper operation,
the DRAM must be powered down and then restarted through the speechified initialization sequence before normal
operation can continue.
Command Truth Table
Function
CKE
CS
Previous Current
Cycle Cycle
RAS CAS WE
BA1 -
BA0
(Extended) Mode
H
Register Set (Load
Mode)
H
L
L
L
L
BA
Refresh (REF)
H
H
L
L
L
H
X
Self Refresh Entry
H
L
L
L
L
H
X
Self Refresh Exit
L
H
H
X
X
X
X
L
H
H
H
Single Bank
Precharge
H
H
L
L
H
L
BA
Precharge all Banks H
H
L
L
H
L
X
Bank Activate
H
H
L
L
H
H
BA
Write
H
H
L
H
L
L
BA
Write with Auto
Precharge
H
H
L
H
L
L
BA
Read
H
H
L
H
L
H
BA
Read with Auto-
Precharge
H
H
L
H
L
H
BA
No Operation
H
X
L
H
H
H
X
Device Deselect
H
X
H
X
X
X
X
Power Down Entry
H
L
H
X
X
X
X
L
H
H
H
Power Down Exit
L
H
H
X
X
X
X
L
H
H
H
A12- A10 A9-A0
A11
Notes
OP Code
1, 2
X
X
X
1
X
X
X
1, 8
X
X
X
1, 7, 8
X
L
X
1, 2
X
H
X
Row Address
X
L Column
X
H Column
1
1,2
1, 2, 3, 10
1, 2, 3, 10
X
L Column 1, 2, 3, 10
X
H Column 1, 2, 3, 10
X
X
X
1
X
X
X
1
X
X
X
1, 4
X
X
X
1, 4
Notes:
1. All DDR2 SDRAM commands are defined by states of CS, RAS, CAS , WE and CKE at the rising edge of the clock.
2. Bank addresses BA0, BA1 (BA) determine which bank is to be operated upon. For (E)MRS BA selects an (Extended) Mode Register.
3. Burst reads or writes at BL=4 cannot be terminated or interrupted. See sections "Reads interrupted by a Read" and "Writes interrupted by a
Write" for details.
4. The Power Down Mode does not perform any refresh operations. The duration of Power Down is therefore limited by the refresh requirements
5. The state of ODT does not affect the states described in this table. The ODT function is not available during Self Refresh. See section 3.4.4.
6. “X” means “H or L (but a defined logic level)”
7. Self refresh exit is asynchronous.
8. VREF must be maintained during Self Refresh operation.
9. BAx and Axx refers to the MSBs of bank addresses and addresses, respectively.
10. For x16 option, A9 is "Don't Care" (X) for Read or Write.
Integrated Silicon Solution, Inc. — www.issi.com
41
Rev. D
08/16/2012