46DR83200A Datasheet, PDF (5/48 Pages) Integrated Silicon Solution, Inc – 32Mx8, 16Mx16 DDR2 DRAM

IS43/46DR83200A, IS43/46DR16160A
PIN CONFIGURATION
PACKAGE CODE: B 60 BALL TW-BGA (Top View) (8.00 mm x 10.5 mm Body, 0.8 mm Ball Pitch)
123456789
A
VDD RDQS _VSS
B
DQ6 VSSQ _DM/RDQS
C
VDDQ DQ1 _VDDQ
D
DQ4 VSSQ _DQ3
E
VDDL VREF _VSS
F
CKE _WE
G
NC BA0 _BA1
H
A10 _A1
J
VSS A3 _A5
K
A7 _A9
L
VDD A12 _NC
VSSQ DQS VDDQ
DQS VSSQ DQ7
VDDQ DQ0 VDDQ
DQ2 VSSQ DQ5
VSSDL CK VDD
RAS CK ODT
CAS CS
A2 A0 VDD
A6 A4
A11 A8 VSS
NC NC
Not populated
Pin name
Function
A0 to A12
Address inputs
BA0, BA1
Bank select
DQ0 to DQ7
Data input/output
DQS, /DQS
Differential data strobe
/CS
Chip select
/RAS, /CAS, /WE Command input
CKE
Clock enable
CK, /CK
Differential clock input
DM
Write data mask
RDQS, /RDQS Differential Redundant Data Strobe
Pin name
ODT
VDD
VSS
VDDQ
VSSQ
VREF
VDDL
VSSDL
NC
Function
ODT control
Supply voltage for internal circuit
Ground for internal circuit
Supply voltage for DQ circuit
Ground for DQ circuit
Input reference voltage
Supply voltage for DLL circuit
Ground for DLL circuit
No connection
Integrated Silicon Solution, Inc. — www.issi.com
5
Rev. D
08/16/2012