BBT3821 Datasheet, PDF (37/75 Pages) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

BBT3821
Table 51. DOM CONTROL REGISTER
MDIO REGISTER ADDRESS = 1.49176 (1.C018’h)
BIT
NAME
SETTING
DEFAULT⁽¹⁾ R/W
DESCRIPTION
1.49176.15:6
Reserved
1.49176.5
Test Control
0’b
R/W
User must keep at 0.
1.49176.4:3
1.49176.2
1.49176.1:0
DOM Update period See Table 52
Indirect DOM Enable 1 = Enable
0 = Disable
Representative
Lane value
00’h
0’b⁽²⁾
00’b⁽²⁾
R/W
R/W
R/W
Controls rates at which DOM A/D values are
updated
Enable updates from four DOM devices. See
Table 33, Table 38
Select Lane for 1.A060:D’h
Note (1): The values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (2): If ‘Indirect DOM Enable’ is set, then the DOM A/D and Flag values are loaded from the I²C spaces pointed to by the Indirect Mode values in Table 53 and
Table 54, and ‘Representative’ controls which lane’s A/D values will appear in 1.A060:D’h. If not, then ‘Representative’ has no effect, and the full DOM area is
updated from a single DOM device. See “DOM Registers” on page 16 for details.
Table 52. DOM PERIODIC UPDATE WAITING TIME VALUES
(Approximate, based on REF_CLOCK = 156.25 MHz; default underlined)
1.41216.1:0
(1.A100’h.1:0) BITS⁽¹⁾
00⁽²⁾
1.49176.4:3 (1.C018’h) BITS⁽¹⁾
01
10
00
N/A
N/A
N/A
01
800ms
1000ms
1300ms
10
11⁽²⁾
400ms
100ms⁽²⁾
500ms
150ms
600ms
200ms
Note (1): See Table 38 and Table 51 for these registers.
Note (2): These are the Default values. The value in 1.C018’h may be overwritten by the Auto-Configure operation
11
N/A
1600ms
700ms
300ms
Table 53. DOM INDIRECT MODE START ADDRESS REGISTERS
MDIO REGISTER ADDRESSES = 1.49177:8 (1.C019:1A’h)
BIT
NAME
SETTING
DEFAULT⁽¹⁾ R/W
DESCRIPTION
1.49177.15:8
1.49177.7:0
Lane 3 DOM
Lane 2 DOM
Start Address
60’h
Start Address
60’h
R/W
R/W
Start address to read A/D values
from DOM monitor device of respective lane
1.49178.15:8
Lane 1 DOM
Start Address
60’h
R/W
1.49178.7:0
Lane 0 DOM
Start Address
60’h
R/W
Note (1): The values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Table 54. DOM INDIRECT MODE DEVICE ADDRESS REGISTERS
BIT
1.49179.15:9
1.49179.8
1.49179.7:1
1.49179.0
1.49180.15:8
MDIO REGISTER ADDRESSES = 1.49179:80 (1.C01B:1C’h)
NAME
SETTING
DEFAULT⁽¹⁾ R/W
DESCRIPTION
Lane 3 DOM
Device Address
54’h
Not used, Set by current operation
Lane 2 DOM
Device Address
53’h
Not used, Set by current operation
R/W
Note: I²C Device address to read A/D values
from DOM monitor device of respective lane is
twice set value. Thus ‘Default’ column
R/W
addresses are A8’h, A6’h A4’h and A2’h for
Lanes 3, 2, 1 & 0 respectively. LSB reflects
‘Read’ operation value
Lane 1 DOM
Device Address
52’h
R/W
1.49180.7
Not used, Set by current operation
1.49180.7:1
Lane 0 DOM
Device Address
51’h
R/W
1.49180.0
Not used, Set by current operation
Note (1): The values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
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