BBT3821 Datasheet, PDF (25/75 Pages) Intersil Corporation – Octal 2.488Gbps to 3.187Gbps/ Lane Retimer

BBT3821
BIT
1.32772.15:8
1.32772.7:0
NAME
Reserved
Write Data
Table 19. I²C ONE-BYTE OPERATION WRITE DATA REGISTER
MDIO Register Address = 1.32772 (1.8004’h)
SETTING
DEFAULT R/W
DESCRIPTION
00’h
I²C Write Data
00’h
RO
R/W
Data to be written by 1-byte Write Operation
Table 20. NVR I²C OPERATION CONTROL REGISTER
MDIO REGISTER ADDRESS = 1.32773 (1.8005’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32773.15:9
1.32773.8
1.32773.7
1.32773.6:4
1.32773.3:2
1.32773.1:0
Reserved
00’h
Long Memory⁽¹⁾ 1 =16 bit
0’b
0 = 8 bit
NVR Write Size
0’b
I²C Bus Speed
Speed of I²C SCL
clock⁽⁴⁾ (derived
from REF_CLOCK)
100’b
NVR ACK Error 11 = 63
11’b
Count
10 = 16
01 = 4
00 = 1
NVR Write Page 11 = 32 bytes
01’b
Size⁽²⁾
10 = 16 bytes
01 = 8 bytes
00 = 4 byte
RO
R/W
Length of address for I²C device selected
R/W
1 = Block write all 256 bytes to NVR⁽²⁾
0 = Write only 1.807F:AE’h to NVR⁽³⁾
R/W
111 = 400kHz
110 = 200kHz
101 = 150kHz
100 = 100kHz
011 = 40kHz
010 = 20kHz
001 = 10kHz
000 = 4kHz
R/W
Number of ACK failures at any address before I²C
Operation failure is reported
R/W
The I²C interface block write operation will issue a
STOP and wait for the EEPROM every time after this
number of bytes are sent out
Note (1): This bit should only be set if an I²C device which needs a 16-bit address is to be addressed. The NVR and DOM spaces are all 8-bit address sections, and for
these areas, this bit should be 0’b.
Note (2): Block 256-byte NVR writes will not occur unless the WRTP pin is set Low. NVR Write Page Size controls Page size for Block operations only.
Note (3): This area corresponds to the XENPAK-defined Customer Area; see XENPAK Spec R3.0 Section 10.12.22. Writes will be performed one byte at a time.
Note (4): The I²C clock speeds listed are approximate. They are derived by division from the CMU, locked to the RFCP/N inputs. At 156.25MHz, the nominal 100kHz
clock will actually be 156.25/1.6kHz, just over 97.5kHz. See also the notes to Table 117.
Table 21. NVR I²C OPERATION STATUS REGISTER
MDIO REGISTER ADDRESS = 1.32774 (1.8006’h)
BIT
NAME
SETTING
DEFAULT R/W
DESCRIPTION
1.32774.15
XP_ENA
XP_ENA pin
RO
1 = XP_ENA pin high, 0 = low
1.32774.14:4
Reserved
0000’h
RO
1.32774.3
Vendor Specific
Error Flag
0’b
RO LH 1 = 1.8106 ! = EXOR(1.80AE:8105)
Area EXOR sum check
0 = 1.8106 = EXOR(1.80AE:8105) ⁽²⁾
1.32774.2
Customer Write Area
Error Flag
0’b
RO LH 1 = 1.80AD ! = EXOR(1.807E:80AC)
EXOR sum check
0 = 1.80AD = EXOR(1.807E:80AC) ⁽²⁾
1.32774.1
Reserved
0’b
RO
LH⁽¹⁾
1.32774.0
NVR Area EXOR sum Error Flag
0’b
RO LH 1 = 1.807D ! = EXOR(1.8007:807C)
check
0 = 1.807D = EXOR(1.8007:807C) ⁽²⁾
Note (1): These bits are latched high on any internal error condition detected. They are reset low (cleared) on being read.
Note (2): These bits are set if the EXOR sum calculated from the indicated range is not the same as the value read into the listed checksum register. Note that this is
NOT the same as the XENPAK-defined checksum calculation. Contact Intersil for a method of reconciling these two checksum calculations.
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