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X6800 Datasheet, PDF (32/122 Pages) Intel Corporation – Core2 Extreme Processor
Electrical Specifications
Table 17.
2.7.7
2.7.8
BSEL[2:0] Frequency Table for BCLK[1:0]
BSEL2
L
L
L
L
H
H
H
H
BSEL1
L
L
H
H
H
H
L
L
BSEL0
L
H
H
L
L
H
H
L
FSB Frequency
266 MHz
RESERVED
RESERVED
200 MHz
RESERVED
RESERVED
RESERVED
333 MHz
Phase Lock Loop (PLL) and Filter
An on-die PLL filter solution will be implemented on the processor. The VCCPLL input is
used for the PLL. Refer to Table 5 for DC specifications.
BCLK[1:0] Specifications (CK505 based Platforms)
Table 18.
Front Side Bus Differential BCLK Specifications
Symbol
Parameter
VL
VH
VCROSS(abs)
ΔVCROSS
VOS
VUS
VSWING
ILI
Cpad
Input Low Voltage
Input High Voltage
Absolute Crossing Point
Range of Crossing Points
Overshoot
Undershoot
Differential Output Swing
Input Leakage Current
Pad Capacitance
Min
-0.30
N/A
0.300
N/A
N/A
-0.300
0.300
-5
.95
Typ
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.2
Max
N/A
1.15
0.550
0.140
1.4
N/A
N/A
5
1.45
Unit
V
V
V
V
V
V
V
μA
pF
Figure
4
4
4, 5
4, 5
4
4
6
Notes1
2
2
3, 4, 5
4
6
6
7
8
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. "Steady state" voltage, not including overshoot or undershoot.
3. Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0
equals the falling edge of BCLK1.
4. VHavg is the statistical average of the VH measured by the oscilloscope.
5. The crossing point must meet the absolute and relative crossing point specifications
simultaneously.
6. Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined as
the absolute value of the minimum voltage.
7. Measurement taken from differential waveform.
8. Cpad includes die capacitance only. No package parasitics are included.
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Datasheet