X6800 Datasheet, PDF (21/122 Pages) Intel Corporation – Core2 Extreme Processor

Electrical Specifications
Table 5.
Voltage and Current Specifications
Symbol
Parameter
Min
Typ
Max Unit Notes^{1, 2}
Processor Number I_CC for
775_VR_CONFIG_06
E6850
3.00 GHz
75
E6750
2.66 GHz
75
E6700
2.66 GHz
75
E6600
2.40 GHz
75
E6550
E6540
2.33 GHz
2.33 GHz
75
—
—
75
I_CC
E6400/E6420
2.13 GHz
E6300/E6320
1.86 GHz
75
A
7
75
E4600
2.40 GHz
75
E4500
2.20 GHz
75
E4400
2.00 GHz
75
E4300
1.80 GHz
75
Processor Number I_CC for
775_VR_CONFIG_05B —
—
X6800
2.93 GHz
90
FSB termination voltage
V_TT
(DC + AC specifications)
1.14 1.20 1.26
V
8
VTT_OUT_LEFT
and
VTT_OUT_RIGHT
I_CC
DC Current that may be drawn from
VTT_OUT_LEFT and VTT_OUT_RIGHT per
pin
—
—
580
mA
9
I_TT
I_CC for V_TT supply before V_CC stable
I_CC for V_TT supply after V_CC stable
4.5
—
—
A
10
4.6
I_{CC_VCCPLL}
I_CC for PLL land
—
—
130
mA
I_{CC_GTLREF}
I_CC for GTLREF
—
—
200
μA
NOTES:
1. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical data.
These specifications will be updated with characterized data from silicon measurements at a later date.
2. Adherence to the voltage specifications for the processor are required to ensure reliable processor operation.
3. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at
manufacturing and can not be altered. Individual maximum VID values are calibrated during manufacturing such
that two processors at the same frequency may have different settings within the VID range. Note this differs
from the VID employed by the processor during a power management event (Thermal Monitor 2, Enhanced Intel
SpeedStep^® Technology, or Extended HALT State).
4. These voltages are targets only. A variable voltage source should exist on systems in the event that a different
voltage is required. See Section 2.3 and Table 2 for more information.
5. The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE lands at the socket
with a 100 MHz bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance.
The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the
system is not coupled into the oscilloscope probe.
6. Refer to Table 6 and Figure 1 for the minimum, typical, and maximum V_CC allowed for a given current. The
processor should not be subjected to any V_CC and I_CC combination wherein V_CC exceeds V_{CC_MAX} for a given
current.
7. I_{CC_MAX} specification is based on the V_{CC_MAX} loadline. Refer to Figure 1 for details.
8. V_TT must be provided via a separate voltage source and not be connected to V_CC. This specification is measured
at the land.
9. Baseboard bandwidth is limited to 20 MHz.
10.This is maximum total current drawn from V_TT plane by only the processor. This specification does not include
the current coming from RTT (through the signal line). Refer to the Voltage Regulator-Down (VRD) 11.0
Processor Power Delivery Design Guidelines For Desktop LGA775 Socket to determine the total I_TT drawn by the
system. This parameter is based on design characterization and is not tested.
Datasheet
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