JA80386EXTC25 Datasheet, PDF (12/56 Pages) Intel Corporation – Intel386™ EX Embedded Microprocessor

Intel386™ EX Embedded Microprocessor
3.0
Pin Description
Table 4 lists the Intel386 EX embedded processor pin descriptions. Table 3 defines the
abbreviations used in the Type and Output States columns of Table 4.
Table 3. Pin Type and Output State Nomenclature
Symbol
Description
Pin Type
#
I
O
I/O
I/OD
ST
P
G
The named signal is active low.
Standard TTL input signal.
Standard CMOS output signal.
Input and output signal.
Input and open-drain output signal.
Schmitt-triggered input signal.
Power pin.
Ground pin.
Output State
H(1)
H(0)
H(Z)
H(Q)
H(X)
Output driven to V_CC during Bus Hold
Output driven to V_SS during Bus Hold
Output floats during Bus Hold
Output remains active during Bus Hold
Output retains current state during Bus Hold
R(WH)
R(WL)
R(1)
R(0)
R(Z)
R(Q)
R(X)
Output Weakly Held at V_CC during Reset
Output Weakly Held at V_SS during Reset
Output driven to V_CC during Reset
Output driven to V_SS during Reset
Output floats during Reset
Output remains active during Reset
Output retains current state during Reset
I(1)^†
Output driven to V_CC during Idle Mode
I(0)
Output driven to V_SS during Idle Mode
I(Z)
Output floats during Idle Mode
I(Q)
Output remains active during Idle Mode
I(X)
Output retains current state during Idle Mode
P(1)
P(0)
P(Z)
P(Q)
P(X)
Output driven to V_CC during Powerdown Mode
Output driven to V_SS during Powerdown Mode
Output floats during Powerdown Mode
Output remains active during Powerdown Mode
Output retains current state during Powerdown Mode
† The idle mode output states assume that no internal bus master (DMA or RCU) has control of the bus
during idle mode
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Datasheet