HYB25D256800CT Datasheet, PDF (91/94 Pages) Infineon Technologies AG – 256 Mbit Double Data Rate SDRAM

HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
System Characteristics for DDR SDRAMs
Table 29 Output Slew Rate Characteristrics (×4, ×8 Devices only)
Slew Rate Characteristic Typical Range (V/ns) Minimum (V/ns)
Pullup Slew Rate
1.2 – 2.5
1.0
Pulldown Slew Rate
1.2 – 2.5
1.0
Maximum (V/ns)
4.5
4.5
Notes
1)2)3)4)5)6)
2)3)4)5)7)
Table 30 Output Slew Rate Characteristics (×16 Devices only)
Slew Rate Characteristic Typical Range (V/ns) Minimum (V/ns)
Pullup Slew Rate
1.2 – 2.5
0.7
Pulldown Slew Rate
1.2 – 2.5
0.7
Maximum(V/ns)
5.0
5.0
Notes
1)2)3)4)5)6)
2)3)4)5)7)
1) Pullup slew rate is characterizted under the test conditions as shown in Figure 52
2) Pullup slew rate is measured between (V_DDQ/2 – 320 mV ± 250 mV)
Pulldown slew rate is measured between (V_DDQ/2 + 320 mV ± 250mV)
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one
output switching.Example: For typical slew rate, DQ0 is switching.For minimum slew rate, all DQ bits are switchiung worst
case pattern. For maximum slew rate, only one DQ is switching from either high to low, or low to high the remainig DQ bits
remain the same as previous state.
3) Evaluation conditions: Typical: 25 °C (T Ambient), V_DDQ = nominal, typical process.Minimum: 70 °C (T Ambient), V_DDQ =
minimum, slow – slow process. Maximum: 0 °C (T Ambient), V_DDQ = maximum, fast – fast process
4) Verified under typical conditions for qualification purposes.
5) TSOP II package devices only.
6) Only intended for operation up to 266 Mbps per pin.
7) Pulldown slew rate is measured under the test conditions shown in Figure 53.
Table 31 Output Slew Rate Matching Ratio Characteristics
Slew Rate Characteristic
DDR266A DDR266B DDR200
Notes
Parameter
Min. Max. Min. Max. Min. Max.
Output SLew Rate Matching Ratio (Pullup to Pulldown) — — — — 0.71 1.4 ^{1) 2)}
1) The ratio of pullup slew rate to pulldown slew rate is specified for the same temperature and voltage, over the entire
temperature and voltage range. For a given output, it represents the maximum difference between pullup and pulldown
drivers due to process variation.
2) DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve setup and hold times.
Signal transitions through the DC region must be monotonic
2XWSXW
Figure 52 Pullup slew rate test load
2XWSXW
Figure 53 Pulldown slew rate test load
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Data Sheet
91
Rev. 1.6, 2004-12
08012003-8754-PAQX