HYB25D256800CT Datasheet, PDF (34/94 Pages) Infineon Technologies AG – 256 Mbit Double Data Rate SDRAM

CK
CK
Command
Address
DQS
DQ
HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Functional Description
CAS Latency = 2
Read
BA a,COL n
NOP
CL=2
NOP
NOP
DOa-n
NOP
NOP
CK
CK
Command
Address
DQS
DQ
CAS Latency = 2.5
Read
BA a,COL n
NOP
NOP
NOP
CL=2.5
DOa-n
NOP
NOP
DO a-n = data out from bank a, column n.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal t_AC, t_DQSCK, and t_DQSQ.
Figure 10 Read Burst: CAS Latencies (Burst Length = 4)
Don’t Care
Data Sheet
34
Rev. 1.6, 2004-12