TLE6266G Datasheet, PDF (8/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
Power Down
Normal Mode
M1 = 1 M0 = 1
all functions active
SPI
SPI
RxD-Only
M1 = 0 M0 = 1
SPI
all functions active
SPI
Cyclic Wake
Cyclic HS OFF
M1 = 1
M0 = 0
V_cc = OFF/ON POR = ON
RTL = 12V RxD = H
WD = OFF 3V SV¹⁾ = ON
SPI
HS3 = OFF
automatic transition after:
- cyclic wake time
- WK pin = H
- CAN bus wake
PWM³⁾
Cyclic HS ON
M1 = 1
M0 = 0
V_cc = ON
RTL = 12V
WD = ON
HS3 = ON
POR = ON
RxD = H/L
3V SV¹⁾ = ON
Start Up
Power Up
SPI
SPI
Power
ON
Reset
SPI
SPI
V_bat Stand-By
M1 = 0 M0 = 0
Vcc = ON
RTL = 12V
WD = ON
POR = ON
PWM HS1²⁾
3VSU = ON
RxD = H/L
t>T_{W DR}
Watch
dog
Reset
SPI
SPI
Mode Bits:
M0 = SPI Input Bit 9
M1 = SPI Input Bit 10
Figure 3 State Diagram
1) 3V supervisor feature only active if selected via SPI
2) HS1 is controlled by the SPI input bit 1(activate HS1) and also the PWM
input pin27 if the SPI input bit 11 (PWM enable) is set. In case both
controls are active, the HS1 switch is masked by the SPI input bit 1 (see
figure 12)
3) this function makes sure that the cyclic HS OFF mode can only be
entered via a correct signal at the PWM pin
Version 1.06
9
2002-11-26