TLE6266G Datasheet, PDF (31/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
8.3 Electrical Characteristics (cont’d)
9 V < V_S < 16 V; I_CC = -100 mA; normal mode; all outputs open; – 40 °C < T_j < 150 °C; CAN-
transceiver circuitry: – 40 °C < T_j < 125 °C; all voltages with respect to ground; positive current
defined flowing into pin; unless otherwise specified.
Parameter
Symbol Limit Values Unit Test Condition
min. typ. max.
High Side Output OUTH3; (controlled by bit 3 and bit 4 of SPI input word)
Static Drain-Source
R _{– DSON H3}
1.0 2.0 W
ON-Resistance;
I_OUTH3 = -0.25 A
1.5 4.0 W
Active zener voltage
V_OUTH3 -5.0 -3.0 -0.5 V
Clamp diode forward voltage V_OUTH3
0.8 1
V
Leakage current
I_OLH3
-100 -5 –
µA
Switch ON delay time
t_dONH3
10 100 µs
Switch OFF delay time
t_dOFFH3
20 100 µs
5.2 V £ V_S £ 9 V
I_OUTH3 = – 0.25 A
I_OUTH3 = 0.25 A
V_OUTH3 = 0 V
CSN high to OUTH3;
R_L = 100 W
CSN high to OUTH3;
R_L = 100 W
Low Side Output OUTL1 ( bit 5 of SPI input word)
Static Drain-Source
ON-Resistance;
I_OUTL1 = 0.1 A
Active zener clamp voltage
Leakage current
Switch ON delay time
Switch OFF delay time
R _{– DSON L1}
V_OUTL1
32
I_OLL1
t_dONL1
t_dOFFL1
1.5 3.0 W
2.0 5.0 W
5.2 V £ V_S £ 9 V
37
42
V
I_OUTL1 = + 0.1 A
5
µA ^VOUTL1 ^{=15 V;}
T_j < 85°C
5
50
µs ^{CSN high to OUTL1;}
R_L = 100 W
5
50
µs ^{CSN high to OUTL1;}
R_L = 100 W
Low Side Output OUTL2 ( bit 6 of SPI input word)
Static Drain-Source
ON-Resistance;
I_OUTL2 = 0.1 A
R _{– DSON L2}
1.5 3.0 W
2.0 5.0 W
5.2 V £ V_S £ 9 V
Version 1.06
32
2002-11-26