TLE6266G Datasheet, PDF (3/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
4
Pin Definitions and Functions
Pin No. Symbol Function
1
CANH CAN-H bus line; HIGH in dominant state
2
RTH
CANH-Termination input; connected to CANH via external
termination resistor
3
RO
Reset output; open drain output; integrated pull up; active LOW
4
CANL CAN-L bus line; LOW in dominant state
5
RTL
CANL-Termination input; connected to CANL via external
termination resistor
6, 7, 8, 9, GND
20, 21,
22, 23
Ground; to reduce thermal resistance place cooling areas on
PCB close to this pins.
10
OUTH1 High side output 1; controlled via PWM input and/or SPI input,
short circuit protected
11
OUTL1 Low side output 1; SPI controlled, with active zener
12
OUTL2 Low side output 2; SPI controlled, with active zener
13
OUTH2 High side output 2; SPI controlled
14
OUTH3 High side output 3; SPI controlled, in cyclic wake mode
controlled by an internal autotiming function
15
VS
Power supply; block to GND directly at the IC with ceramic
capacitor
16
CSN
SPI interface Chip Select Not; CSN is an active low input; serial
communication is enabled by pulling the CSN terminal LOW.
CSN input should only be transitioned when CLK is LOW. CSN
has an internal active pull up and requires CMOS logic level
inputs. See Figure 11 for more details.
17
DO
SPI interface Data Out; DO is a tristate output that transfers
diagnosis data to the control device. Serial data transfered from
DO is a 16 bit diagnosis word with the Least Significant Bit (LSB)
transmitted first. The output will remain 3-stated unless the device
is selected by a LOW on Chip-Select-Not (CSN). DO will accept
data on the rising edge of CLK-signal; see Table 6 for output data
protocol and Figure 11 for more timing details.
Version 1.06
4
2002-11-26