TLE6266G Datasheet, PDF (38/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
8.3 Electrical Characteristics (cont’d)
9 V < V_S < 16 V; I_CC = -100 mA; normal mode; all outputs open; – 40 °C < T_j < 150 °C; CAN-
transceiver circuitry: – 40 °C < T_j < 125 °C; all voltages with respect to ground; positive current
defined flowing into pin; unless otherwise specified.
Parameter
Symbol Limit Values Unit Test Condition
min. typ. max.
SPI-Interface
Logic Inputs DI and CSN
H-input voltage threshold
L-input voltage threshold
Hysteresis of input voltage
Pull up current at pin CSN
Pull down current at pin DI
Input capacitance
at pin CSN, DI
V_IH
V_IL
V_IHY
I_ICSN
I_ICLK/DI
C_I
–
–
0.2 ´ –
V_CC
50 200
-100 -25
5
25
–
10
0.7 ´ V
V_CC
–
V
500 mV
-5 mA
100 mA
15 pF
V_CSN = 0.7 ´ V_CC
V_DI = 0.2 ´ V_CC
0 V < V_CC < 5.25 V
Logic Output DO
H-output voltage level
V_DOH
L-output voltage level
Tri-state leakage current
Tri-state input capacitance
V_DOL
I_DOLK
C_DO
Data Input Timing
Clock period
Clock high time
Clock low time
Clock low before CSN low
CSN setup time
Version 1.06
t_pCLK
t_CLKH
t_CLKL
t_bef
t_lead
V_CC V_CC –
– 1.0 – 0.7
V
I_DOH = 1 mA
–
0.2 0.4 V
I_DOL = – 1.6 mA
-10 –
10
mA ^VCSN ^{= V}CC
0 V < V_DO < V_CC
–
10
15
pF
V_CSN = V_CC
0 V < V_CC < 5.25 V
1000 –
500 –
500 –
500 –
500 –
39
– ns
– ns
– ns
– ns
– ns
2002-11-26