TLE6266G Datasheet, PDF (23/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
Mode State
Normal Mode
Normal Mode
Cyclic HS ON
CSN,
SPI word*
SPI
normal
mode
SPI
cyclic HS
ON
Watchdog trigger bit
=SPI bit0**
Cyclic HS OFF
Cyclic HS ON
Cyclic HS ON
SPI
cyclic HS
ON
SPI
normal
mode
Normal Mode
Vbat Stdby
t
closed
window
Window watchdog***
open
window
closed
window
open
window
long open window
HS3
Cyclic wake time
48ms selected
48ms
PWM
PWM trigger
PWM
trigger
* for the exact timing relations between CSN
and SPI-DI and -DO word please look at
datasheet fig. 11,12,13,14,15
** bit0 is transfered with the SPI input word
BUT
the watchdog trigger is set, after readout of
the SPI input bit = CSN LOW to HIGH
(see arrows at CSN signal)
long open window
closed
window
open
window
closed
window
missing trigger =
timeout =
Watchdog Reset
open
window
Watchdog reset pulse time t_WDR
t
long open window
t
t
t
*** for a correct watchdog triggering:
closed window must always exceed 12 cycles
open window is max. 20 cycles
long open window is max. 128 cycles
otherwise
a watchdog reset will be generated
Figure 10 Cyclic Wake with Cyclic Wake Autotiming Function
Version 1.06
24
2002-11-26