TLE6266G Datasheet, PDF (17/50 Pages) Infineon Technologies AG – System Basis Chip

Target Datasheet TLE 6266
11 HIGH. In case of both control inputs being active the PWM signal is masked by the
SPI signal (see Figure 16, High Side Switch 1 Timing Diagram).
The SPI output bit 14 monitors a thermal shutdown of the switches, whereas output bit
4 flags a thermal prewarning. So the microcontroller is able to reduce the power
dissipation of the TLE 6266 by switching off functions of minor priority before the
temperature threshold of the thermal shutdown is reached. Further OUTH1 is protected
against short circuit and overload. The SPI output bit 1 indicates an overload of OUTH1.
As soon as the under-voltage condition of the supply voltage is met (V_S < V_UVOFF), the
switches are automatically disabled by the under-voltage lockout circuit. This is flagged
by the SPI output bit 3. Moreover the switch is disabled when a reset occurs. After the
second correct triggered watchdog, the switch is released for usage.
6.11 High Side Switch 2
The high side output OUTH2 is able to switch loads up to 250 mA. Its on-resistance is
1.0 W typ. @ 25°C. This switch is controlled via the SPI input bit 2.
The SPI output bit 14 monitors a thermal shutdown of the switches, whereas output bit
4 flags a thermal prewarning. So the microcontroller is able to reduce the power
dissipation of the TLE 6266 by switching off functions of minor priority before the
temperature threshold of the thermal shutdown is reached. As soon as the under-voltage
condition of the supply voltage is met (V_S < V_UVOFF), the switches are automatically
disabled by the under-voltage lockout circuit. This is flagged by the SPI output bit 3.
Moreover the switch is disabled when a reset occurs. After the second correct triggered
watchdog, the switch is released for usage.
6.12 High Side Switch 3
The high side output OUTH3 is able to switch loads up to 250 mA. Its ON-resistance is
1.0 W typ. @ 25°C. This switch is controlled via the SPI input bits 3 and 4. To supply
external wake-up circuits in low power mode (cyclic wake mode), the output OUTH3 is
periodically activated by entering the cyclic wake HS ON mode. The autotiming period
is programable via SPI (see Table 2).This has to be done, to minimize the current
consumption depending on the cyclic wake time (see Figure 21).
In the cyclic wake mode, the PWM signal is used to switches HS3 from the cyclic HS ON
to the cyclic HS OFF state, if correctly triggered within the long open window (see Figure
17). This is called the “fail-safe PWM” feature
The SPI output bit 14 monitors a thermal shutdown of the switches, whereas output bit
4 flags a thermal prewarning. So the microcontroller is able to reduce the power
dissipation of the TLE 6266 by switching off functions of minor priority before the
temperature threshold of the thermal shutdown is reached. As soon as the under-voltage
condition of the supply voltage is met (V_S < V_UVOFF), the switches are automatically
disabled by the under-voltage lockout circuit. This is flagged by the SPI output bit 3.
Version 1.06
18
2002-11-26