TC1797_14 Datasheet, PDF (45/192 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1797
Introduction
• Automatic delayed read access to Input Command Request Register (IBCR) if a data
transfer from Input Shadow Buffer to Message RAM to (initiated by a previous write
access to the IBCR) is ongoing.
• Four Input Buffer for building up transmission Frames in parallel.
• Flag indicating which Input Buffer is currently accessible by the host.
Data Sheet
41
V1.3, 2014-08