TC1797_14 Datasheet, PDF (44/192 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1797
Introduction
The Mod_Name module communicates with the external world via three I/O lines each
channel. The RXDAx and RXDBx lines are the receive data input signals, TXDA and
TXDB lines are the transmit output signals, TXENA and TXENB the transmit enable
signals.
Clock control, address decoding, and service request control are managed outside the
Mod_Name module kernel.
2.5.4.2 Overview
For communication on a FlexRay™ network, individual Message Buffers with up to 254
data byte are configurable. The message storage consists of a single-ported Message
RAM that holds up to 128 Message Buffers. All functions concerning the handling of
messages are implemented in the Message Handler. Those functions are the
acceptance filtering, the transfer of messages between the two FlexRay™ Channel
Protocol Controllers and the Message RAM, maintaining the transmission schedule as
well as providing message status information.
The register set of the Mod_Name IP-module can be accessed directly by an external
Host via the module’s Host interface. These registers are used to
control/configure/monitor the FlexRay™ Channel Protocol Controllers, Message
Handler, Global Time Unit, System Universal Control, Frame and Symbol Processing,
Network Management, Service Request Control, and to access the Message RAM via
Input / Output Buffer.
The Mod_Name IP-module supports the following features:
• Conformance with FlexRay™ protocol specification v2.1
• Data rates of up to 10 Mbit/s on each channel
• Up to 128 Message Buffers configurable
• 8 Kbyte of Message RAM for storage of e.g. 128 Message Buffers with max. 48 byte
data field or up to 30 Message Buffers with 254 byte Data Sections
• Configuration of Message Buffers with different payload lengths possible
• One configurable receive FIFO
• Each Message Buffer can be configured as receive buffer, as transmit buffer or as
part of the receive FIFO
• Host access to Message Buffers via Input and Output Buffer.
Input Buffer: Holds message to be transferred to the Message RAM
Output Buffer: Holds message read from the Message RAM
• Filtering for slot counter, cycle counter, and channel
• Maskable module service requests
• Network Management supported
• Four service request lines
• Automatic delayed read access to Output Command Request Register (OBCR) if a
data transfer from Message RAM to Output Shadow Buffer (initiated by a previous
write access to the OBCR) is ongoing.
Data Sheet
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V1.3, 2014-08